IGBT/FET-based energy savings device for reducing a predetermined amount of voltage using pulse width modulation

• US 9,716,431 B2
• Filed: 04/11/2014
• Issued: 07/25/2017
• Est. Priority Date: 08/13/2007
• Status: Active Grant

• Current Assignee: Powerwise Group, Inc.
• Original Assignee: Powerwise Group, Inc.
• Inventors: Lumsden, John L
• Primary Examiner(s): Zhang, Jue
• Assistant Examiner(s): Jackson, Lakaisha
• Application Number:
  US14/250,797
• Publication Number:
  US 20140368172A1
• Time in Patent Office: 1,201 Days
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 5/293 using semiconductor devices only

Abstract

An IGBT/FET-based energy savings device, system and method wherein a predetermined amount of voltage below a nominal line voltage and/or below a nominal appliance voltage is saved, thereby conserving energy. Phase input connections are provided for inputting analog signals into the device and system. A magnetic flux concentrator senses the incoming analog signal and a volts zero crossing point detector determines the zero volts crossing point of the signal. The positive half cycle and negative half cycle of the signal are identified and routed to a digital signal processor for processing the signal. The signal is reduced by pulse width modulation and the reduced amount of energy is outputted, thereby yielding an energy savings for an end user.

Claims

1. A method of reducing energy consumption by an energy savings device comprising:

receiving a predetermined amount of energy having an analog signal;

determining a zero crossing point of the analog signal;

identifying a positive half cycle and a negative half cycle of the analog signal;

reducing the predetermined amount of energy of the analog signal by providing pulse width modulation to the analog signal during the positive half cycle;

clamping a first back electromotive force associated with reducing the predetermined amount of energy of the analog signal during the positive half cycle;

reducing the predetermined amount of energy of the analog signal by providing pulse width modulation to the analog signal during the negative half cycle;

clamping a second back electromotive force associated with reducing the predetermined amount of energy of the analog signal during the negative half cycle; and

outputting a reduced amount of energy.

2. The method of claim 1, wherein the analog signal includes a plurality of slices and wherein the pulse width modulation removes at least one of the plurality of slices from the analog signal.

3. The method of claim 1, wherein clamping the first back electromotive force includes triggering a first shunt control transistor as a first routing switch to clamp the first back electromotive force.

4. The method of claim 1, wherein clamping the second back electromotive force includes triggering a second shunt control transistor as a second routing switch to clamp the second back electromotive force.

5. The method of claim 1, wherein the reduced amount of energy is output at a point of consumption.

6. The method of claim 5, wherein the reduced amount of energy is output based on energy saving parameters including at least one of a desired root-mean-square voltage value, a desired voltage reduction percentage, and a desired savings reduction percentage.

7. The method of claim 1, wherein the energy savings parameters are obtained at a point of consumption.

8. A non-transitory computer-readable storage medium storing instructions which, when executed by an energy savings device having a processor, causes the processor to:

receive a signal corresponding to a predetermined amount of energy having an analog signal;

determine a zero crossing point of the analog signal;

identify a positive half cycle and a negative half cycle of the analog signal;

reduce the predetermined amount of energy of the analog signal by providing pulse width modulation to the analog signal during the positive half cycle;

clamp a first back electromotive force associated with reducing the predetermined amount of energy of the analog signal during the positive half cycle;

reduce the predetermined amount of energy of the analog signal by providing pulse width modulation to the analog signal during the negative half cycle;

clamp a second back electromotive force associated with reducing the predetermined amount of energy of the analog signal during the negative half cycle; and

generate a signal to output a reduced amount of energy.

9. The non-transitory computer-readable storage medium of claim 8, wherein the analog signal includes a plurality of slices and wherein the pulse width modulation removes at least one of the plurality of slices from the analog signal.

10. The non-transitory computer-readable storage medium of claim 8, wherein clamping the first back electromotive force includes triggering a first shunt control transistor as a first routing switch to clamp the first back electromotive force.

11. The non-transitory computer-readable storage medium of claim 8, wherein clamping the second back electromotive force includes triggering a second shunt control transistor as a second routing switch to clamp the second back electromotive force.

12. The non-transitory computer-readable storage medium of claim 8, wherein the signal to output the reduced amount of energy is generated at a point of consumption.

13. The non-transitory computer-readable storage medium of claim 12, wherein the signal to output the reduced amount of energy is generated based on energy saving parameters including at least one of a desired root-mean-square voltage value, a desired voltage reduction percentage, and a desired savings reduction percentage.

14. The non-transitory computer-readable storage medium of claim 13, wherein the energy savings parameters are obtained at a point of consumption.

15. An energy savings system for reducing energy consumption, comprising:

an input connection that receives a predetermined amount of energy having an analog signal;

an output connection that outputs a reduced amount of energy; and

a microprocessor that communicates with the input connection, the output connection, and a computer-readable non-volatile memory having instructions stored thereon that, when executed by the microprocessor, cause the microprocessor to;

receive a signal corresponding to the predetermined amount of energy having the analog signal;

determine a zero crossing point of the analog signal;

identify a positive half cycle and a negative half cycle of the analog signal;

reduce the predetermined amount of energy of the analog signal by providing pulse width modulation to the analog signal during the positive half cycle;

clamp a first back electromotive force associated with reducing the predetermined amount of energy of the analog signal during the positive half cycle;

reduce the predetermined amount of energy of the analog signal by providing pulse width modulation to the analog signal during the negative half cycle;

clamp a second back electromotive force associated with reducing the predetermined amount of energy of the analog signal during the negative half cycle; and

generate a signal to output a reduced amount of energy.

16. The system of claim 15, wherein the analog signal includes a plurality of slices and wherein the pulse width modulation removes at least one of the plurality of slices from the analog signal.

17. The system of claim 15, wherein the microprocessor clamps the first back electromotive force by triggering a first shunt control transistor as a first routing switch that clamps the first back electromotive force.

18. The system of claim 15, wherein the microprocessor clamps the second back electromotive force by triggering a second shunt control transistor as a second routing switch that clamps the second back electromotive force.

19. The system of claim 15, wherein the reduced amount of energy is output at a point of consumption.

20. The system of claim 19, wherein the reduced amount of energy is output based on energy saving parameters including at least one of a desired root-mean-square voltage value, a desired voltage reduction percentage, and a desired savings reduction percentage and wherein the energy savings parameters are obtained at a point of consumption.