Printed circuit board with compact groups of devices

• US 9,743,522 B2
• Filed: 09/26/2012
• Issued: 08/22/2017
• Est. Priority Date: 09/26/2012
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Li, Xingqun, Ribas, Carlos, Pyper, Dennis R., Foster, James H., Fisher, Jr., Joseph R., Mullins, Scott P., Mayo, Sean A., Chen, Wyeman
• Primary Examiner(s): Sawyer, Steven T
• Application Number:
  US13/627,989
• Publication Number:
  US 20140085850A1
• Time in Patent Office: 1,791 Days
• Field of Search: 3613014, 361328, 361329
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2924/15153 the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15159 Side view
• CPC Class Codes: H01L 2924/15192 Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/19103 interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
• CPC Class Codes: H05K 1/0231 Capacitors or dielectric substances
• CPC Class Codes: H05K 1/0233 Filters, inductors or a magnetic substance
• CPC Class Codes: H05K 1/11 Printed elements for providing electric connections to or between printed circuits
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 1/181 associated with surface mounted components
• CPC Class Codes: H05K 1/183 Components mounted in and supported by recessed areas of the printed circuit board
• CPC Class Codes: H05K 1/185 Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit semiconductor chips encapsulated by interconnect and support structures H01L23/5389, H01L24/00
• CPC Class Codes: H05K 2201/10015 Non-printed capacitor
• CPC Class Codes: H05K 2201/10022 Non-printed resistor
• CPC Class Codes: H05K 2201/1003 Non-printed inductor
• CPC Class Codes: H05K 2201/1006 Non-printed filter
• CPC Class Codes: H05K 2201/10378 Interposers
• CPC Class Codes: H05K 2201/10454 Vertically mounted
• CPC Class Codes: H05K 2201/10515 Stacked components
• CPC Class Codes: H05K 2201/10522 : Adjacent components
• CPC Class Codes: H05K 2201/1053 : Mounted components directly electrically connected to each other, i.e. not via the PCB
• CPC Class Codes: H05K 2201/10537 : Attached components
• CPC Class Codes: H05K 2201/10636 : Leadless chip, e.g. chip capacitor or resistor
• CPC Class Codes: H05K 2201/10734 : Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 2203/1316 : Moulded encapsulation of mounted components
• CPC Class Codes: H05K 2203/1327 : Moulding over PCB locally or completely applying non-metallic protective coatings for encapsulating mounted components H05K3/284
• CPC Class Codes: H05K 3/284 : for encapsulating mounted components H05K1/185 takes precedence
• CPC Class Codes: H05K 3/303 : Surface mounted components, e.g. affixing before soldering, aligning means, spacing means H05K3/32 takes precedence
• CPC Class Codes: H05K 3/4614 : the electrical connections between the circuit boards being made during lamination
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product
• CPC Class Codes: Y10T 29/49146 : with encapsulating, e.g., potting, etc.

Abstract

Electronic devices may contain electrical systems in which electrical components are mounted on a substrate such as a printed circuit board. The electrical components may include surface mount technology components. Multiple surface mount technology components may be stacked on top of each other and beside each other to form an electrical component that minimizes the amount of area that is consumed on a printed circuit board. Noise suppression circuits and other circuits may be implemented using stacked surface mount technology components. Surface mount technology components placed on the printed circuit board may be pushed together and subsequently injection molded to form packed component groups. An integrated circuit may be mounted to the printed circuit board via an interposer and may cover components mounted to the printed circuit board. An integrated circuit may be mounted over a recessed portion of the printed circuit board on which components are mounted.

Claims

1. Apparatus, comprising:

a printed circuit board having printed circuit board contacts on a surface; and

an electrical component formed from a plurality of stacked surface mount technology components on the surface of the printed circuit board, wherein;

the plurality of stacked surface mount technology components includes at least a first surface mount technology component having first component contacts, a second surface mount technology component having second component contacts, a third surface mount technology component having third component contacts, and a fourth surface mount technology component having fourth component contacts;

the electrical component has first, second, and third terminals coupled directly to the printed circuit board contacts;

the first and second surface mount technology components are both mounted directly to the printed circuit board and the third and fourth surface mount technology components are mounted on the first and second surface mount technology components;

the third surface mount technology component has a first portion that overlaps the first surface mount technology component without overlapping the second surface mount technology component and a second portion that is different than the first portion that overlaps the second surface mount technology component without overlapping the first surface mount technology component; and

the fourth surface mount technology component has a first portion that overlaps the first surface mount technology component without overlapping the second surface mount technology component and a second portion that is different than the first portion that overlaps the second surface mount technology component without overlapping the first surface mount technology component.

2. The apparatus defined in claim 1 further comprising an integrated circuit on the printed circuit board, wherein the integrated circuit comprises a power supply input and the electrical component is configured to reduce noise on the power supply input.

3. The apparatus defined in claim 2 wherein the first surface mount technology component comprises a capacitor and the second surface mount technology component comprises a capacitor.

4. The apparatus defined in claim 3 wherein the third surface mount technology component comprises a capacitor.

8. The apparatus defined in claim 4, wherein the fourth surface mount technology component comprises an inductor.

12. The apparatus defined in claim 1, wherein the first surface mount technology component is interposed between the printed circuit board and the third and fourth surface mount technology components.

13. The apparatus defined in claim 12, wherein the second surface mount technology component is interposed between the printed circuit board and the third and fourth surface mount technology components.

14. The apparatus defined in claim 13, wherein the first and second surface mount technology components are laterally adjacent to each other on the printed circuit board.

5. Apparatus, comprising:

a printed circuit board having first, second, and third printed circuit board contacts; and

an electrical component formed from a plurality of stacked surface mount technology components on the printed circuit board, wherein;

the plurality of stacked surface mount technology components includes a first surface mount technology component having first and second component contacts, a second surface mount technology component having third and fourth component contacts, a third surface mount technology component having fifth and sixth component contacts, and a fourth surface mount technology component having seventh and eight component contacts;

the first and second surface mount technology components are mounted adjacent to each other on the printed circuit board such that the first component contact is soldered to the first printed circuit board contact, the second component contact is soldered to the second printed circuit board contact, and the third component contact is soldered to the third printed circuit board contact;

the third surface mount technology component is mounted on the first and second surface mount technology components;

the fourth surface mount technology component is mounted on the first and second surface mount technology components and adjacent to the third surface mount technology component;

the sixth component contact is soldered to the third component contact;

the third surface mount technology component has a first portion that overlaps the first surface mount technology component without overlapping the second surface mount technology component and a second portion that is different than the first portion that overlaps the second surface mount technology component without overlapping the first surface mount technology component; and

the fourth surface mount technology component has a first portion that overlaps the first surface mount technology component without overlapping the second surface mount technology component and a second portion that is different than the first portion that overlaps the second surface mount technology component without overlapping the first surface mount technology component.

6. The apparatus defined in claim 5 further comprising an integrated circuit on the printed circuit board, wherein the integrated circuit comprises a power supply input and the electrical component is configured to reduce noise on the power supply input.

7. The apparatus defined in claim 6 wherein the first surface mount technology component comprises a resistor, the second surface mount technology component comprises a capacitor, and the third surface mount technology component comprises a capacitor.

9. The apparatus defined in claim 5, wherein the sixth component contact is soldered to the third component contact with solder, the solder is interposed between the third component contact and the sixth component contact, and the solder, the third component contact, and the sixth component contact are vertically overlapping.

10. The apparatus defined in claim 9, wherein the seventh component contact is soldered to the sixth component contact with additional solder.

11. The apparatus defined in claim 10, wherein the additional solder is interposed between the sixth component contact and the seventh component contact and the additional solder, sixth component contact, and seventh component contact are not vertically overlapping.