Input device interference determination
First Claim
1. An interference determining (ID) circuit for a capacitive sensor device, said ID circuit comprising:
- a receiver circuit comprising;
a feedback capacitor; and
an amplifier external to the feedback capacitor and comprising;
a first input for receiving a reference voltage;
a second input associated with a resulting signal from a sensor electrode of said capacitive sensor device; and
a first set of transistors comprising gates and a plurality of currents flowing through the first set of transistors,wherein said receiver circuit is configured to output an integrated version of said resulting signal using the feedback capacitor and the first set of transistors;
an absolute differential circuit separate from said amplifier and comprising;
a second set of transistors that mirror the plurality of currents, wherein the gates of the first set of transistors are coupled to the gates of the second set of transistors; and
a third set of transistors comprising a current mirror and configured for outputting a single difference signal, wherein said single difference signal represents an absolute differential between the plurality of currents; and
a comparator circuit coupled with said absolute differential circuit and configured for receiving said single difference signal from said absolute differential circuit and generating a non-linearity indication based on a comparison of said single difference signal with at least one reference signal,wherein the non-linearity indication corresponds to the amplifier.
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Accused Products
Abstract
An interference determining circuit for a capacitive sensor device comprises an amplifier, absolute differential circuitry, and comparator circuitry. The amplifier is configured for receiving a reference voltage at a first input and for receiving a resulting signal at a second input. The resulting signal is from a sensor electrode of the capacitive sensor device. The absolute differential circuitry is coupled with an output of the amplifier and configured for outputting a difference signal. The difference signal represents an absolute differential between currents utilized in the amplifier. The comparator circuitry is coupled with the absolute differential circuitry and configured for generating a non-linearity indication based on a comparison of the difference signal with at least one reference signal.
14 Citations
20 Claims
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1. An interference determining (ID) circuit for a capacitive sensor device, said ID circuit comprising:
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a receiver circuit comprising; a feedback capacitor; and an amplifier external to the feedback capacitor and comprising; a first input for receiving a reference voltage; a second input associated with a resulting signal from a sensor electrode of said capacitive sensor device; and a first set of transistors comprising gates and a plurality of currents flowing through the first set of transistors, wherein said receiver circuit is configured to output an integrated version of said resulting signal using the feedback capacitor and the first set of transistors; an absolute differential circuit separate from said amplifier and comprising; a second set of transistors that mirror the plurality of currents, wherein the gates of the first set of transistors are coupled to the gates of the second set of transistors; and a third set of transistors comprising a current mirror and configured for outputting a single difference signal, wherein said single difference signal represents an absolute differential between the plurality of currents; and a comparator circuit coupled with said absolute differential circuit and configured for receiving said single difference signal from said absolute differential circuit and generating a non-linearity indication based on a comparison of said single difference signal with at least one reference signal, wherein the non-linearity indication corresponds to the amplifier. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of interference determination in a capacitive sensor device, said method comprising:
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receiving, by a receiver circuit comprising a feedback capacitor and an amplifier, a resulting signal from a sensor electrode of said capacitive sensor device, wherein said amplifier comprises a first set of transistors comprising gates and a plurality of currents flowing through the first set of transistors; outputting, using the feedback capacitor and the first set of transistors, an integrated version of said resulting signal; generating, by an absolute differential circuit comprising a second set of transistors that mirror the plurality of currents and a third set of transistors comprising a current mirror, a single difference signal representing an absolute differential between the plurality of currents, wherein the gates of the first set of transistors are coupled to the gates of the second set of transistors; and generating a non-linearity indication, by a comparator circuit, based upon a comparison of said single difference signal, received from said absolute differential circuit, with at least one reference signal, wherein the non-linearity indication corresponds to the amplifier. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. An input device comprising:
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a sensor pattern including a transmitter electrode and a receiver electrode; and a processing system coupled with said sensor pattern and configured to; drive a transmitter signal onto said transmitter electrode; receive, by a receiver circuit comprising a feedback capacitor and an amplifier, a resulting signal from said receiver electrode, wherein said amplifier comprises a first set of transistors comprising gates and a plurality of currents flowing through the first set of transistors; output, using the feedback capacitor and the first set of transistors, an integrated version of said resulting signal; generate, by an absolute differential circuit comprising a second set of transistors that mirror the plurality of currents and a third set of transistors, a single difference signal representing an absolute differential between the plurality of currents, wherein the gates of the first set of transistors are coupled to the gates of the second set of transistors; generate a non-linearity indication, by a comparator circuit, based on a comparison of said single difference signal, received from said absolute differential circuit, with at least one reference signal, wherein the non-linearity indication corresponds to the amplifier; and take one of a plurality of actions based on said non-linearity indication. - View Dependent Claims (17, 18, 19, 20)
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Specification