Memory system performing read of nonvolatile semiconductor memory device
First Claim
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1. A memory system comprising:
- a nonvolatile semiconductor memory device including a memory cell array having a first block including a memory cell; and
a control unit configured to set a voltage supplied to the memory cell array in a read,whereinthe control unit is configured to set a first voltage supplied to the memory cell of the first block in a first read in a first operation, andthe control unit is configured to set a second voltage supplied to the memory cell of the first block in a second read after a lapse of a first standing time from the first operation, the second voltage different from the first voltage.
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Abstract
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.
42 Citations
21 Claims
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1. A memory system comprising:
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a nonvolatile semiconductor memory device including a memory cell array having a first block including a memory cell; and a control unit configured to set a voltage supplied to the memory cell array in a read, wherein the control unit is configured to set a first voltage supplied to the memory cell of the first block in a first read in a first operation, and the control unit is configured to set a second voltage supplied to the memory cell of the first block in a second read after a lapse of a first standing time from the first operation, the second voltage different from the first voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A memory system comprising:
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a nonvolatile semiconductor memory device including a memory cell array having a first block including a memory cell; and a control unit configured to set a voltage supplied to the memory cell array in a read, wherein the control unit is configured to set a first voltage supplied to the memory cell of the first block in a first read after a first operation is performed m times (m is an integer of 1 or more), and the control unit is configured to set a second voltage supplied to the memory cell of the first block in a second read after the first operation is performed n times (n is an integer of m+1 or more), the second voltage different from the first voltage, the second read performed after a lapse of a first standing time from the first read. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A memory system comprising:
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a nonvolatile semiconductor memory device including a memory cell array having a first block including a memory cell; and a control unit configured to set a voltage supplied to the memory cell array in a read, wherein the control unit is configured to set a first voltage supplied to the memory cell of the first block in a first read in a first operation, and the control unit is configured to set a second voltage supplied to the memory cell of the first block in a second read after a lapse of a first standing time or more from the first operation, the second voltage different from the first voltage.
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Specification