Organic light emitting display apparatus having reduced effect of parasitic capacitance

• US 9,792,855 B2
• Filed: 07/06/2015
• Issued: 10/17/2017
• Est. Priority Date: 12/29/2014
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Seo, Myeonghee, Choi, Junwon, Woo, Minkyu
• Primary Examiner(s): Yang, Kwang-Su
• Application Number:
  US14/791,660
• Publication Number:
  US 20160189609A1
• Time in Patent Office: 834 Days
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

An organic light emitting display apparatus includes first and second pixels on a display region, first and second scan lines connected to the first and second pixels respectively, and a gate driver to output a first scan signal and a second scan signal to the first and second scan lines respectively. The first pixel includes a first pixel circuit and a first organic light emitting diode (OLED). The second pixel includes a second pixel circuit and a second OLED. Each of the first and second pixel circuits includes a driving transistor to output driving current to the anode of a respective one of the first and second OLEDs. The anode of the second OLED at least partially overlaps the gate of a driving transistor of the first pixel circuit.

Claims

1. An organic light emitting display apparatus, comprising:

first and second pixels on a display region;

first and second scan lines connected to the first and second pixels respectively; and

a gate driver to output a first scan signal and a second scan signal to the first and second scan lines respectively, wherein the first pixel includes a first pixel circuit and a first organic light emitting diode (OLED) and the second pixel includes a second pixel circuit and a second OLED, wherein each of the first and second pixel circuits includes a driving transistor to output driving current to an anode of a respective one of the first and second OLEDs, and wherein the anode of the second OLED at least partially overlaps a gate of a driving transistor of the first pixel circuit, wherein;

a voltage level of a gate of a driving transistor of the first pixel circuit is changed by a first variance according to a change in a voltage level of the anode of the second OLED at a scanning time by the second scan signal,

the voltage level of the gate of the driving transistor of the first pixel circuit is changed by a second variance according to the change in the voltage level of the anode of the second OLED at an emitting time of the second OLED controlled by an emission control signal, and

the second variance is at least partially compensated by the first variance.

2. The apparatus as claimed in claim 1, further comprising:

a controller to output a horizontal synchronization signal to the gate driver, wherein the gate driver is to output the first and second scan signals in synchronization with the horizontal synchronization signal, and wherein a scanning time of the first scan signal precedes a scanning time of the second scan signal.

3. The apparatus as claimed in claim 2, wherein the scanning time of the first scan signal precedes the scanning time of the second scan signal by a cycle of the horizontal synchronization signal.

4. The apparatus as claimed in claim 2, further comprising:

third and fourth pixels adjacent to the display region;

third and fourth scan lines respectively connected to the third and fourth pixels; and

a second data line commonly connected to the third and fourth pixels,

wherein the third pixel includes a third pixel circuit and a third OLED,

wherein the fourth pixel includes a fourth pixel circuit and a fourth OLED,

wherein each of the third and fourth pixel circuits includes a driving transistor to output a driving current to an anode of a respective one of the third and fourth OLEDs,

wherein the anode of the third OLED is in a different region from gates of the driving transistors of the third and fourth pixel circuits in the display region, and

wherein the anode of the fourth OLED is in a different region from gates of the driving transistors of the third and fourth pixel circuits in the display region.

5. The apparatus as claimed in claim 1, further comprising:

a first data line commonly connected to the first and second pixels; and

a source driver synchronized with the first and second scan signals and to output a data signal to the first data line.

6. The apparatus as claimed in claim 5, wherein each of the first and second pixel circuits includes:

a switching transistor to transfer the data signal based on a respective one of the first and second scan signals; and

a storage capacitor to charge a voltage corresponding to the transferred data signal, wherein the driving transistor is to output the driving current corresponding to the voltage charged in the storage capacitor to the anode of a respective one of the first and second OLEDs.

7. The apparatus as claimed in claim 6, wherein each of the first and second pixel circuits includes:

a compensation transistor to electrically connect a gate and a drain of the driving transistor based on a respective one of the first and second scan signals; and

a gate initialization transistor to transfer an initialization voltage to the gate of the driving transistor based on a respective one of third and fourth scan signals, wherein a scanning time of the third scan signal precedes a scanning time by the first scan signal, and wherein a scanning time by the fourth scan signal precedes a scanning time by the second scan signal.

8. The apparatus as claimed in claim 7, further comprising:

a controller to output a horizontal synchronization signal to the gate driver, wherein the gate driver is to output the first and second scan signals in synchronization with the horizontal synchronization signal, wherein the scanning time of the third scan signal precedes a scanning time of the first scan signal by a cycle of the horizontal synchronization signal, and wherein the scanning time of the fourth scan signal precedes the scanning time of the second scan signal by the cycle of the horizontal synchronization signal.

9. The apparatus as claimed in claim 7, wherein each of the first and second pixel circuits includes:

an operation control transistor to be controlled by the emission control signal, the operation control transistor disposed between a driving voltage line and a source of the driving transistor; and

an emission control transistor to be controlled by the emission control signal, the emission control transistor disposed between a drain of the driving transistor and the anode of a respective one of the first and second OLEDs, wherein the operation control transistor and the emission control transistor are to output a driving current generated by the driving transistor to the anode of the respective one of the first and second OLEDs based on the emission control signal.

10. The apparatus as claimed in claim 9, wherein each of the first and second pixel circuits includes:

an anode initialization transistor to transfer the initialization voltage to the anode of the respective one of first and second OLEDs based on a respective one of the first and second scan signals.

11. The apparatus as claimed in claim 10, wherein a time when a storage capacitor of the first pixel circuit is completely charged precedes a time when the initialization voltage is transferred to the anode of the second OLED by the anode initialization transistor of the second pixel circuit and the emitting time of the second OLED by the emission control transistor of the second pixel circuit.

12. The apparatus as claimed in claim 1, further comprising:

a third pixel on the display region,

wherein the third pixel includes a third pixel circuit and a third OLED,

wherein the third pixel circuit includes a driving transistor to output a driving current to an anode of the third OLED, and wherein the anode of the third OLED at least partially overlaps a gate of a driving transistor of the second pixel circuit.

13. An organic light emitting display apparatus, comprising:

first and second pixel regions on a display region;

first and second scan lines respectively connected to the first and second pixel regions; and

a gate driver to respectively output a first scan signal and a second scan signal to the first and second scan lines, wherein the first pixel region includes a first pixel circuit and a first organic light emitting diode (OLED), wherein

the second pixel region includes a second pixel circuit and a second OLED, wherein each of the first and second pixel circuits includes a driving transistor, wherein

an anode of the first OLED at least partially overlaps a gate of a driving transistor of the first pixel circuit, wherein

an anode of the second OLED at least partially overlaps the gate of the driving transistor of the second pixel circuit, wherein

the second pixel circuit is to output a driving current to the anode of the first OLED, wherein

a voltage level of a gate of a driving transistor of the first pixel circuit is changed by a first variance according to a change in a voltage level of the anode of the first OLED at a scanning time by the second scan signal, wherein

the voltage level of the gate of the driving transistor of the first pixel circuit is changed by a second variance according to the change in the voltage level of the anode of the first OLED at an emitting time of the first OLED controlled by an emission control signal, and wherein

the second variance is at least partially compensated by the first variance.

14. The apparatus as claimed in claim 13, further comprising:

a controller to output a horizontal synchronization signal to the gate driver, wherein the gate driver is to output the first and second scan signals in synchronization with the horizontal synchronization signal, and wherein a scanning time of the first scan signal precedes a scanning time of the second scan signal.

15. The apparatus as claimed in claim 14, wherein the scanning time of the first scan signal precedes the scanning time of the second scan signal by a cycle of the horizontal synchronization signal.

16. The apparatus as claimed in claim 14, further comprising:

a first data line commonly connected to the first and second pixels; and

a source driver synchronized with the first and second scan signals and to output a data signal to the first data line, wherein each of the first and second pixel circuits includes;

a switching transistor to transfer the data signal based on a respective one of the first and second scan signals; and

a storage capacitor to charging a voltage corresponding to the transferred data signal, wherein the driving transistor is to output the driving current corresponding to the voltage charged in the storage capacitor.

17. The apparatus as claimed in claim 16, further comprising:

a controller to output a horizontal synchronization signal to the gate driver, wherein the gate driver is to be synchronized with the horizontal synchronization signal and is to output the first and second scan signals,

wherein each of the first and second pixel circuits includes;

a compensation transistor to electrically connect a gate and a drain of the driving transistor based on a respective one of the first and second scan signals; and

a gate initialization transistor to transfer an initialization voltage to the gate of the driving transistor based on a respective one of the third and fourth scan signals, wherein a scanning time of the third scan signal precedes a scanning time of the first scan signal by a cycle of the horizontal synchronization signal, and wherein a

scanning time of the fourth scan signal precedes a scanning time of the second scan signal by the cycle of the horizontal synchronization signal.

18. The apparatus as claimed in claim 17, wherein each of the first and second pixel circuits includes:

an operation control transistor to be controlled by the emission control signal, the operation control transistor disposed between a driving voltage line and a source of the driving transistor; and

an emission control transistor to be controlled by the emission control signal, the emission control transistor disposed between a drain of the driving transistor and each of the anodes of the first and second OLEDs, wherein the operation control transistor and the emission control transistor are to output a driving current generated by the driving transistor based on the emission control signal.

19. The apparatus as claimed in claim 18, wherein the second pixel circuit includes:

an anode initialization transistor to transfer the initialization voltage to the anode of the first OLED based on the second scan signal, wherein a time when a storage capacitor of the first pixel circuit is completely charged precedes a time when the initialization voltage is transferred to the anode of the first OLED by the anode initialization transistor of the second pixel circuit and the emitting time of the first OLED by the emission control transistor of the second pixel circuit.