Re-enumeration of USB 3.0 compatible devices

• US 9,804,859 B2
• Filed: 09/19/2014
• Issued: 10/31/2017
• Est. Priority Date: 09/29/2011
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Bajpai, Pradeep, Rundell, Robert, Raza, Syed Babar
• Primary Examiner(s): Tsai, Henry
• Assistant Examiner(s): ROCHE, JOHN B
• Application Number:
  US14/491,809
• Publication Number:
  US 20150100707A1
• Time in Patent Office: 1,138 Days
• Field of Search: 710 10
• CPC Class Codes: G06F 1/3293 by switching to a less power-consuming processor, e.g. sub-CPU
• CPC Class Codes: G06F 11/3051 Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs verification or detection of system hardware configuration G06F11/2247
• CPC Class Codes: G06F 13/4286 using a handshaking protocol, e.g. RS232C link
• CPC Class Codes: G06F 3/00 Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57
• CPC Class Codes: G06F 8/654 using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
• CPC Class Codes: G06F 9/4411 Configuring for operating with peripheral devices; Loading of device drivers
• CPC Class Codes: G06F 9/4415 Self describing peripheral devices
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A host device can download a firmware update to a peripheral device having previously enumerated with the host device. The host device can perform link training with the peripheral device in response to a re-enumeration indication received from the peripheral device. The link training can include switching a Link Training and Status State Machine (LTSSM) in the host device from an active state (U0) to an RX.Detect state and synchronizing with the peripheral device in the RX.Detect state. The host device can re-enumerate with the peripheral device utilizing the firmware update after the host device completes link training with the peripheral device.

Claims

1. A method comprising:

a peripheral device operating in a first power mode, the peripheral device being enumerated by a host device over a Universal Serial Bus (USB) 3.0 compatible bus and in an active (U0) state;

the peripheral device determining to switch from the first power mode to a second power mode;

the peripheral device sending a USB 3.0 compatible message to induce the host device to initiate re-enumeration in response to determining to switch from the first power mode to the second power mode, wherein;

inducing the host device to initiate the re-enumeration comprises sending an indication that causes the host device to enter an RX.Detect mode followed by return to the active (U0) state, and

wherein the indication is of a simulated condition of a device that is not a current condition of the device; and

the peripheral device informing the host device, as part of the re-enumeration, that the peripheral device operates in the second power mode.

2. The method of claim 1, wherein the first power mode is a self-powered mode and the second power mode is a bus-powered mode.

3. The method of claim 1, wherein the first power mode is a bus-powered mode and the second power mode is a self-powered mode.

4. The method of claim 1, wherein the peripheral device determining to switch from the first power mode to the second power mode comprises detecting that a power supply for the peripheral device has dropped below a minimum threshold level.

5. The method of claim 1, wherein the peripheral device determining to switch from the first power mode to the second power mode comprises detecting that the peripheral device has been plugged into an external power source.

6. The method of claim 1, wherein the indication is an error message that specifies one of:

stopping of LUP transmission;

stopping of LGOOD and LCRD transmissions; and

a corrupt sequence number on one of a LGOOD, LCRD, and a header packet.

7. The method of claim 1, wherein the indication specifies a successful LFPS exit handshake from a lower power state.

8. The method of claim 1, wherein the indication specifies an improper LFPS during an exit handshake from a low power state.

9. The method of claim 1, wherein the peripheral device informing the host device that peripheral device operates in the second power mode comprises sending a descriptor identifying the second power mode as part of the re-enumeration.

10. A peripheral device comprising:

a memory device;

a processor coupled to the memory device and configured to communicate over a Universal Serial Bus (USB) 3.0 compatible bus, the processor further configured to;

operate in a first power mode after being enumerated by a host device and in an active (U0) state;

determine to switch from the first power mode to a second power mode;

send a USB 3.0 compatible message to induce the host device to initiate re-enumeration in response to determining to switch from the first power mode to the second power mode, wherein;

the USB 3.0 compatible message comprises an indication that causes the host device to enter an RX.Detect mode followed by a return to the active (U0) state, and

wherein the indication is of a simulated condition of the peripheral device that is not the current condition of the peripheral device; and

inform the host device about the second power mode as part of the re-enumeration.

11. The peripheral device of claim 10, wherein the first power mode is a self-powered mode and the second power mode is a bus-powered mode.

12. The peripheral device of claim 10, wherein the first power mode is a bus-powered mode and the second power mode is a self-powered mode.

13. The peripheral device of claim 10, wherein in order to determine to switch to the second power mode, the processor is further configured to detect that a power supply for the peripheral device has dropped below a minimum threshold level.

14. The peripheral device of claim 10, wherein in order to determine to switch to the second power mode, the processor is further configured to detect that the peripheral device has been plugged into an external power source.

15. The peripheral device of claim 10, wherein the indication is an error message that specifies one of:

stopping of LUP transmission;

stopping of LGOOD and LCRD transmissions; and

a corrupt sequence number on one of a LGOOD, LCRD, and a header packet.

16. The peripheral device of claim 10, wherein the indication specifies a successful LFPS exit handshake from a lower power state.

17. The peripheral device of claim 10, wherein the indication specifies an improper LFPS during an exit handshake from a low power state.

18. The peripheral device of claim 10, wherein in order to inform the host device about the second power mode, the processor is further configured to send a descriptor identifying the second power mode as part of the re-enumeration.