RGBZ pixel unit cell with first and second Z transfer gates

• US 9,871,065 B2
• Filed: 12/22/2014
• Issued: 01/16/2018
• Est. Priority Date: 12/22/2014
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Google Inc. (Alphabet Inc.)
• Inventors: Wan, Chung Chun, Fowler, Boyd
• Primary Examiner(s): Hunter, Mishawn
• Application Number:
  US14/579,965
• Publication Number:
  US 20160181298A1
• Time in Patent Office: 1,121 Days
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 27/14641 Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14649 Infrared imagers
• CPC Class Codes: H01L 27/1465 of the hybrid type
• CPC Class Codes: H04N 23/11 for generating image signals from visible and infrared light wavelengths
• CPC Class Codes: H04N 23/57 Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/705 Pixels for depth measurement, e.g. RGBZ
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

An image sensor is described having a pixel array. The pixel array has a unit cell that includes visible light photodiodes and an infra-red photodiode. The visible light photodiodes and the infra-red photodiode are coupled to a particular column of the pixel array. The unit cell has a first capacitor coupled to the visible light photodiodes to store charge from each of the visible-light photodiodes. The unit cell has a readout circuit to provide the first capacitor'"'"'s voltage on the particular column. The unit cell has a second capacitor that is coupled to the infra-red photodiode through a first transfer gate transistor to receive charge from the infra-red photodiode during a time-of-flight exposure. The first capacitor is coupled to the infra-red photodiode through a second transfer gate transistor to receive charge from the infra-red photodiode during the time-of-flight exposure.

Claims

1. An apparatus, comprising:

an image sensor comprising a pixel array having a unit cell that includes visible light photodiodes and an infra-red photodiode, the visible light photodiodes and the infra-red photodiode coupled to a particular column of the pixel array, the unit cell having a first capacitor coupled to the visible light photodiodes to store charge from each of the visible-light photodiodes, the unit cell having a readout circuit to provide the first capacitor'"'"'s voltage on the particular column, the unit cell having a second capacitor that is coupled to the infra-red photodiode through a first transfer gate transistor to receive charge from the infra-red photodiode during a time-of-flight exposure, the first capacitor being coupled to the infra-red photodiode through a second transfer gate transistor to receive charge from the infra-red photodiode during the time-of-flight exposure.

2. The apparatus of claim 1 wherein the second capacitor is coupled to the readout circuit, the readout circuit to also provide the second capacitor'"'"'s voltage on the particular column.

3. The apparatus of claim 2 wherein the unit cell comprises a reset transistor that is coupled to both the first and second capacitors to clear respective charge from the first capacitor and the second capacitor.

4. The apparatus of claim 2 wherein the second capacitor is coupled to the first capacitor through a transistor.

5. The apparatus of claim 1 wherein the unit cell comprises a reset transistor that is coupled to both the first and second capacitors to clear respective charge from the first capacitor and the second capacitor.

6. The apparatus of claim 1 wherein the second capacitor is coupled to the first capacitor through a transistor.

7. The apparatus of claim 1 wherein the visible light photodiodes and the infrared photodiode are coupled to respective back-drain transistors.

8. The apparatus of claim 1 wherein the unit cell further comprises a second readout circuit coupled to the second capacitor, the second readout circuit to provide the second capacitor'"'"'s voltage on the particular column.

9. The apparatus of claim 1 wherein the unit cell further comprises a back-drain transistor coupled to said infra-red photodiode.

10. The apparatus of claim 9 wherein the unit cell further comprises a respective back-drain transistor coupled to each of the visible light photodiodes.

11. A computing system, comprising:

an applications processor having multiple processing cores coupled to a memory controller, said memory controller coupled to a system memory;

a camera system coupled to said applications processor, said camera system comprising an image sensor comprising a pixel array having a unit cell that includes visible light photodiodes and an infra-red photodiode, the visible light photodiodes and the infra-red photodiode coupled to a particular column of the pixel array, the unit cell having a first capacitor coupled to the visible light photodiodes to store charge from each of the visible-light photodiodes, the unit cell having a readout circuit to provide the first capacitor'"'"'s voltage on the particular column, the unit cell having a second capacitor that is coupled to the infra-red photodiode through a first transfer gate transistor to receive charge from the infra-red photodiode during a time-of-flight exposure, the first capacitor being coupled to the infra-red photodiode through a second transfer gate transistor to receive charge from the infra-red photodiode during the time-of-flight exposure.

12. The computing system of claim 11 wherein the second capacitor is coupled to the readout circuit, the readout circuit to also provide the second capacitor'"'"'s voltage on the particular column.

13. The computing system of claim 11 wherein the unit cell comprises a reset transistor that is coupled to both the first and second capacitors to clear respective charge from the first capacitor and the second capacitor.

14. The computing system of claim 11 wherein the second capacitor is coupled to the first capacitor through a transistor.

15. The computing system of claim 11 wherein the unit cell comprises a reset transistor that is coupled to both the first and second capacitors to clear respective charge from the first capacitor and the second capacitor.

16. The computing system of claim 11 wherein the second capacitor is coupled to the first capacitor through a transistor.

17. The computing system of claim 11 wherein the visible light photodiodes and the infrared photodiode are coupled to respective back-drain transistors.

18. The computing system of claim 11 wherein the unit cell further comprises a second readout circuit coupled to the second capacitor, the second readout circuit to provide the second capacitor'"'"'s voltage on the particular column.