Systems and methods for reduced size detector electronics

• US 9,891,328 B2
• Filed: 09/30/2015
• Issued: 02/13/2018
• Est. Priority Date: 09/30/2015
• Status: Active Grant

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Shahar, Arie, Ofan, Avishai, Levy, Jeffrey Michael, Cohen-Erner, Moshe, Glazer, Yaron
• Primary Examiner(s): Malkowski, Kenneth J
• Application Number:
  US14/871,033
• Publication Number:
  US 20170090047A1
• Time in Patent Office: 867 Days
• CPC Class Codes: G01T 1/17 Circuit arrangements not adapted to a particular type of detector pulse-selection circuits H03K, G01R
• CPC Class Codes: G01T 1/247 Detector read-out circuitry for processing gain or off-set correction H04N
• CPC Class Codes: H01L 27/146 Imager structures
• CPC Class Codes: H01L 27/14605 Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
• CPC Class Codes: H04N 25/46 by combining or binning pixels

Abstract

A radiation detector processing assembly is provided including at least one application specific integrated circuit (ASIC). The radiation detector processing assembly includes plural input channels, a common readout, and a readout channel. Each input channel is configured to receive an input corresponding to a detection event from a pixel of a pixelated detector. The common readout is operably coupled to the plural input channels, and is configured to receive a corresponding output signal from each input channel. Each corresponding output signal has a unique address identifying the corresponding input channel. The readout channel is configured to receive a corresponding readout output from the common readout. The readout output includes output signals from a corresponding group of input channels.

Claims

1. A radiation detector processing assembly comprising at least one application specific integrated circuit (ASIC), the radiation detector processing assembly comprising:

at least one track and hold circuit portion;

plural input channels, each input channel configured to receive an input corresponding to a detection event from a pixel of a pixelated detector;

a common readout operably coupled to the plural input channels, the common readout configured to receive a corresponding output signal from each input channel, each corresponding output signal having a unique address identifying the corresponding input channel; and

a readout channel configured to receive a corresponding readout output from the common readout, the readout output comprising output signals from a corresponding group of input channels;

wherein the at least one track and hold circuit portion is shared by the corresponding group of input channels providing output signals to the readout channel and wherein each of the input channels of the corresponding group of input channels comprises a discriminator circuit portion configured to place the input channel in electrical communication with the track and hold circuit portion based on a strength of a received signal from the pixelated detector by the input channel.

2. The radiation detector processing assembly of claim 1, further comprising plural readout channels configured to receive corresponding readout outputs comprising output signals from corresponding groups of input channels.

3. The radiation detector processing assembly of claim 1, wherein each of the input channels of the corresponding group of input channels comprises a shaper circuit portion configured to offset the received signal a predetermined distance corresponding to voltage or energy offset configured for identification of a particular input channel providing a given output signal.

4. The radiation detector processing assembly of claim 3, wherein the corresponding group of input channels comprises four input channels.

5. A radiation detector assembly comprising:

a pixelated detector having a surface;

plural pixelated anodes disposed on the surface, each pixelated anode configured to generate a signal responsive to reception of a photon by the pixelated anode; and

a radiation detector processing assembly comprising at least one application specific integrated circuit (ASIC), the radiation detector processing assembly comprising;

at least one track and hold circuit portion;

plural input channels, each input channel operably coupled to a corresponding pixelated anode of the pixelated detector and configured to receive an input corresponding to a detection event from the corresponding pixelated anode;

a common readout operably coupled to the plural input channels, the common readout configured to receive a corresponding output signal from each input channel, each corresponding output signal having a unique address identifying the corresponding input channel; and

a readout channel configured to receive a corresponding readout output from the common readout, the readout output comprising output signals from a corresponding group of input channels;

wherein the at least one track and hold circuit portion is shared by the corresponding group of input channels providing output signals to the readout channel and wherein each of the input channels of the corresponding group of input channels comprises a discriminator circuit portion configured to place the input channel in electrical communication with the track and hold circuit portion based on a strength of a received signal from the pixelated detector by the input channel.

6. The radiation detector assembly of claim 5, further comprising plural readout channels configured to receive corresponding readout outputs comprising output signals from corresponding groups of input channels.

7. The radiation detector assembly of claim 6, further comprising a collimator configured to be interposed between the pixelated detector and an object being imaged, the collimator comprising plural openings, wherein the pixelated anodes corresponding to a particular group of at least one input channel are disposed within a boundary defined by a corresponding opening of the collimator.

8. The radiation detector processing assembly of claim 5, wherein each of the input channels of the corresponding group of input channels comprises a shaper circuit portion configured to offset the received signal a predetermined distance corresponding to voltage or energy offset configured for identification of a particular input channel providing a given output signal.

9. The radiation detector processing assembly of claim 8, wherein the corresponding group of input channels comprises four input channels.

10. A method of providing a radiation detector assembly comprising:

providing a pixelated detector having a surface and plural pixelated anodes disposed on the surface, each pixelated anode configured to generate a signal responsive to reception of a photon by the pixelated anode;

operably coupling the pixelated detector to a radiation detector processing assembly comprising at least one application specific integrated circuit (ASIC) and at least one track and hold circuit portion, wherein each pixelated anode of the pixelated detector is communicably coupled with a corresponding input channel of the radiation detector processing assembly, each input channel configured to receive an input corresponding to a detection event from the corresponding pixelated anode of the pixelated detector, each input channel including at least one of a dedicated discriminator or a dedicated shaper for the corresponding input channel;

communicably coupling a common readout to the plural input channels, the common readout configured to receive a corresponding output signal from each input channel, each corresponding output signal having a unique address identifying the corresponding input channel; and

communicably coupling a readout channel to the common readout, the readout channel configured to receive a corresponding readout output from the common readout, the readout output comprising output signals from a corresponding group of input channels, wherein the at least one track and hold circuit portion is shared by the corresponding group of input channels providing output signals to the readout channel and wherein each of the input channels of the corresponding group of input channels comprises a discriminator circuit portion configured to place the input channel in electrical communication with the track and hold circuit portion based on a strength of a received signal from the pixelated detector by the input channel.

11. The method of claim 10, further comprising communicably coupling plural readout channels to the common readout, the plural readout channels configured to receive corresponding readout outputs comprising output signals from corresponding groups of input channels.

12. The method of claim 11, further comprising coupling a collimator to the pixelated detector, the collimator configured to be interposed between the pixelated detector and an object being imaged, the collimator comprising plural openings, wherein the pixels corresponding to a particular group of at least one input channel are disposed within a boundary defined by a corresponding opening of the collimator.

13. The method of claim 10, wherein each of the input channels of the corresponding group of input channels comprises a shaper circuit portion configured to offset the received signal a predetermined distance corresponding to voltage or energy offset configured for identification of a particular input channel providing a given output signal.

14. The method of claim 13, wherein the corresponding group of input channels comprises four input channels.