Data processing method, precoding method, and communication device

• US 9,900,125 B2
• Filed: 05/15/2017
• Issued: 02/20/2018
• Est. Priority Date: 01/11/2013
• Status: Active Grant

• Current Assignee: Sun Patent Trust
• Original Assignee: Sun Patent Trust
• Inventors: Murakami, Yutaka, Kimura, Tomohiro, Ouchi, Mikihiro
• Primary Examiner(s): Torres, Juan A
• Application Number:
  US15/594,771
• Publication Number:
  US 20170250779A1
• Time in Patent Office: 281 Days
• Field of Search: 375340, 375267
• CPC Class Codes: H03M 13/255 with Low Density Parity Check [LDPC] codes
• CPC Class Codes: H04B 7/0413 MIMO systems
• CPC Class Codes: H04L 1/0003 by switching between different modulation schemes
• CPC Class Codes: H04L 1/0004 applied to control information
• CPC Class Codes: H04L 1/003 Adaptive formatting arrangements particular to signalling, e.g. variable amount of bits
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0067 Rate matching H04L1/0013 and H04L1/08 take precedence
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04L 1/08 by repeating transmission, e.g. Verdan system H04L1/1858 and H04L1/189 take precedence
• CPC Class Codes: H04L 5/005 of common pilots, i.e. pilots destined for multiple users or terminals

Abstract

An encoder outputs a first bit sequence having N bits. A mapper generates a first complex signal s1 and a second complex signal s2 with use of bit sequence having X+Y bits included in an input second bit sequence, where X indicates the number of bits used to generate the first complex signal s1, and Y indicates the number of bits used to generate the second complex signal s2. A bit length adjuster is provided after the encoder, and performs bit length adjustment on the first bit sequence such that the second bit sequence has a bit length that is a multiple of X+Y, and outputs the first bit sequence after the bit length adjustment as the second bit sequence. As a result, a problem between a codeword length of a block code and the number of bits necessary to perform mapping by a set of modulation schemes is solved.

Claims

1. A transmission device comprising:

error correction encoding circuitry which, in operation, generates a first encoded data sequence from an input data sequence using a first coding rate and a first code length, and generates a second encoded data sequence from a control information sequence using a second coding rate and a second code length;

mapping circuitry which, in operation, generates a first modulation symbol sequence by applying a Quadrature Phase Shift Keying (QPSK) modulation scheme or a 64 Quadrature Amplitude Modulation (QAM) scheme to the first encoded data sequence, and generates a second modulation symbol sequence by applying the QPSK modulation scheme or the 64QAM scheme to the second encoded data sequence; and

transmitting circuitry which, in operation, transmits the first modulation symbol sequence and the second modulation symbol sequence, wherein

the first code length and the second code length are different from each other,

the first coding rate and the second coding rate are the same,

the mapping circuitry generates (i) the first modulation symbol sequence and the second modulation symbol sequence by using same mapping pattern when the QPSK modulation scheme is used, (ii) the first modulation symbol sequence and second modulation symbol sequence by using different mapping patterns when the 64 QAM scheme is used.

2. A reception device comprising:

control information demapping circuitry which, in operation, demodulates an encoded control information sequence from a reception signal, the encoded control information sequence being obtained by demapping a second modulation symbol sequence included in the reception signal using a Quadrature Phase Shift Keying (QPSK) modulation scheme or a 64 Quadrature Amplitude Modulation (QAM) scheme;

control information decoder circuitry which, in operation, decodes the encoded control information sequence having a second coding rate;

demapping circuitry which, in operation, demodulates a first encoded data sequence based on the decoded control information sequence, the first encoded data sequence being obtained by demapping a first modulation symbol sequence included in the reception signal using the QPSK modulation scheme or the 64QAM scheme; and

decoding circuitry which, in operation, decodes the first encoded data sequence having a first coding rate based on the decoded control information sequence, wherein

the decoded control information sequence includes information of the QPSK modulation scheme or the 64QAM scheme, a code length of the first encoded data sequence, and the first coding rate,

the first code length and the second code length are different from each other,

the first coding rate and the second coding rate are the same,

the control information demapping circuitry demodulates the second modulation symbol sequence by using either a first mapping pattern of the QPSK modulation scheme or a first mapping pattern of the 64 QAM scheme, and

the demapping circuitry demodulates the first modulation symbol sequence by using either the first mapping pattern of the QPSK modulation scheme or a second mapping patterns of the 64 QAM scheme, the second mapping patterns of the 64 QAM scheme being different from the first mapping patterns of the 64 QAM scheme.

3. A transmission method comprising:

generating a first encoded data sequence from an input data sequence using a first coding rate and a first code length, and generating a second encoded data sequence from a control information sequence using a second coding rate and a second code length;

generating a first modulation symbol sequence by applying a Quadrature Phase Shift Keying (QPSK) modulation scheme or a 64 Quadrature Amplitude Modulation (QAM) scheme to the first encoded data sequence, and generating a second modulation symbol sequence by applying the QPSK modulation scheme or the 64QAM scheme to the second encoded data sequence; and

transmitting the first modulation symbol sequence and the second modulation symbol sequence, wherein

the first code length and the second code length are different from each other,

the first coding rate and the second coding rate are the same,

(i) the first modulation symbol sequence and the second modulation symbol sequence are generated by using same mapping pattern when the QPSK modulation scheme is used, and

(ii) the first modulation symbol sequence and second modulation symbol sequence are generated by using different mapping patterns when the 64 QAM scheme is used.

4. A reception method comprising:

demodulating an encoded control information sequence from a reception signal, the encoded control information sequence being obtained by demapping a second modulation symbol sequence included in the reception signal using a Quadrature Phase Shift Keying (QPSK) modulation scheme or a 64 Quadrature Amplitude Modulation (QAM) scheme;

decoding the encoded control information sequence having a second coding rate;

demodulating a first encoded data sequence based on the decoded control information sequence, the first encoded data sequence being obtained by demapping a first modulation symbol sequence included in the reception signal using the QPSK modulation scheme or the 64QAM scheme; and

decoding the first encoded data sequence having a first coding rate based on the decoded control information sequence, wherein

the decoded control information sequence includes information of the QPSK modulation scheme or the 64QAM scheme, a code length of the first encoded data sequence, and the first coding rate,

the first code length and the second code length are different from each other,

the first coding rate and the second coding rate are the same,

the second modulation symbol sequence is demodulated by using either a first mapping pattern of the QPSK modulation scheme or a first mapping pattern of the 64 QAM scheme, and

the first modulation symbol sequence is demodulated by using either the first mapping pattern of the QPSK modulation scheme or a second mapping patterns of the 64 QAM scheme, the second mapping patterns of the 64 QAM scheme being different from the first mapping patterns of the 64 QAM scheme.