Voltage swing uniformity in radio-frequency switches

• US 9,923,594 B2
• Filed: 10/22/2016
• Issued: 03/20/2018
• Est. Priority Date: 02/04/2013
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Madan, Anuj, Fuh, Hanching, Altunkilic, Fikret, Blin, Guillaume Alexandre
• Primary Examiner(s): KIM, JUNG H
• Application Number:
  US15/331,849
• Publication Number:
  US 20170041040A1
• Time in Patent Office: 514 Days
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H04B 1/44 Transmit/receive switching
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence

Abstract

Fabricating a radio-frequency switching circuit involves providing a substrate, forming, on the substrate, one or more field-effect transistors connected in series to define a radio-frequency signal path between an input end and an output end, each field-effect transistor having a source, a drain, a gate node, and a body node, and forming an element coupled to a selected body node of the one or more field-effect transistors connected in series to thereby provide reduced voltage distribution variation across the switching circuit.

Claims

1. A method for fabricating a radio-frequency switching circuit, the method comprising:

providing a substrate;

forming, on the substrate, a first field-effect transistor having a first body node and a second field-effect transistor having a second body node, the first and second field-effect transistors being connected in series to define at least part of a radio-frequency signal path between an input node and an output node; and

forming a voltage distribution circuit including a connection path connected between the first body node and the second body node, the connection path including a first resistor in series with a first capacitor, the voltage distribution circuit further including a resistive network connected between the first body node and the second body node, the resistive network including a bias node connected between third and fourth resistors.

2. The method of claim 1 wherein the substrate includes a semiconductor substrate.

3. The method of claim 1 further comprising forming a feed-forward capacitive element from the input node to the first body node of the first field-effect transistor.

4. The method of claim 3 wherein forming the feed-forward capacitive element from the input node to the first body node of the first field-effect transistor includes forming the feed-forward capacitive element from a source or a drain of the first field-effect transistor to the body node of the first field-effect transistor.

5. The method of claim 1 further comprising forming resistive elements coupled to gate nodes of the first and second field-effect transistors.

6. The method of claim 3 further comprising forming a resistive element coupled in series with the feed-forward capacitive element.

7. A method for fabricating a packaged module, the method comprising:

providing a packaging substrate;

providing a semiconductor die;

forming an integrated circuit on the semiconductor die, the integrated circuit including a switch having a first field-effect transistor having a first body node and a second field-effect transistor having a second body node, the first and second field-effect transistors defining a radio-frequency signal path between an input port and an output port, the integrated circuit further including a voltage distribution circuit coupled to the switch and configured to reduce voltage distribution variation across the switch when the switch is in an ON state and encountered by a respective radio-frequency signal at the input port, the voltage distribution circuit including a connection path connected between the first body node and the second body node, the connection path including a first resistor in series with a first capacitor, the voltage distribution circuit further including a resistive network connected between the first body node and the second body node, the resistive network including a bias node connected between third and fourth resistors; and

mounting the semiconductor die on the packaging substrate.

8. The method of claim 7 wherein the integrated circuit further comprises at least one connection configured to facilitate passage of signals to and from the switch.

9. The method of claim 7 further comprising a packaging structure configured to provide protection for the switch.

10. A method of fabricating an integrated circuit, the method comprising:

forming, on a substrate, a switch capable of being in ON and OFF states, the switch including a first field-effect transistor having a first body node and a second field-effect transistor having a second body node, the first and second field-effect transistors defining a radio-frequency signal path between an input port and an output port; and

coupling a voltage distribution circuit to the switch configured to reduce voltage distribution variation across the switch, the voltage distribution circuit including a connection path connected between the first body node and the second body node, the connection path including a first resistor in series with a first capacitor, the voltage distribution circuit further including a resistive network connected between the first body node and the second body node, the resistive network including a bias node connected between third and fourth resistors.

11. The method of claim 10 wherein the voltage distribution circuit further includes a feed-forward capacitive element coupled between the input port and the first body node.

12. The method of claim 11 wherein the input port is coupled to a source or drain of the first field-effect transistor.

13. The method of claim 11 wherein the feed-forward capacitive element is connected in series with a resistive element.

14. The method of claim 10 wherein the voltage distribution circuit further includes a resistive element coupled to a gate node of the first field-effect transistor to thereby enable floating of the gate node of the first field-effect transistor.