MISO equalization with ADC averaging
First Claim
Patent Images
1. An apparatus comprising:
- a circuit configured to;
generate a set of first ADC samples based on a first signal associated with a first read head position and a failed segment;
generate a set of second ADC samples based on a second signal associated with a second read head position and the failed segment; and
generate, by a MISO equalizer, a set of equalized ADC samples based on the set of first ADC samples and the set of second ADC samples.
1 Assignment
0 Petitions
Accused Products
Abstract
An apparatus may include a circuit configured to generate a set of first ADC samples based on a first signal associated with a first read head position and a failed segment and to generate a set of second ADC samples based on a second signal associated with a second read head position and the failed segment. The circuit may then generate, by a MISO equalizer, a set of equalized ADC samples based on the set of first ADC samples and the set of second ADC samples.
71 Citations
20 Claims
-
1. An apparatus comprising:
a circuit configured to; generate a set of first ADC samples based on a first signal associated with a first read head position and a failed segment; generate a set of second ADC samples based on a second signal associated with a second read head position and the failed segment; and generate, by a MISO equalizer, a set of equalized ADC samples based on the set of first ADC samples and the set of second ADC samples. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
11. A system comprising:
-
one or more ADC circuits configured to; generate a plurality of sets of first ADC samples based on a first signal associated with a first read head position and a failed segment; and generate a plurality of sets of second ADC samples based on a second signal associated with a second read head position and the failed segment; one or more accumulator circuits configured to; generate averaged first ADC samples based on the plurality of sets of first ADC samples; and generate averaged second ADC samples based on the plurality of sets of second ADC samples; and a MISO equalizer configured to; generate one or more equalized ADC samples based on the averaged first ADC samples and the averaged second ADC samples. - View Dependent Claims (12, 13, 14, 15)
-
-
16. A system comprising:
-
one or more ADC circuits configured to; generate a set of first ADC samples based on a first signal associated with a first read head position and a failed segment; and generate a set of second ADC samples based on a second signal associated with a second read head position and the failed segment; and a MISO equalizer configured to; generate a set of equalized ADC samples based on the set of first ADC samples and the set of second ADC samples. - View Dependent Claims (17, 18, 19, 20)
-
Specification