Semiconductor device including optimized gate stack profile
First Claim
1. A method of fabricating a semiconductor device including an enhanced electrically conductive gate profile, the method comprising:
- forming a semiconductor substrate that extends along a first axis to define a length and a second axis opposite the first axis to define a height;
forming a sacrificial gate atop the semiconductor substrate, the sacrificial gate including a base portion formed on an upper surface of the semiconductor substrate and an upper surface portion located opposite the base portion;
expanding the upper surface portion of the sacrificial gate with respect to the base portion to form an expanded sacrificial gate;
removing the expanded sacrificial gate to form a gate trench including a base region having a first trench length and an upper surface region having a second trench length greater than the first trench length; and
filling the gate trench with an electrically conductive material so as to form an electrically conductive gate having the enhanced electrically conductive gate profile,wherein the electrically conductive gate extends along the second axis between a base and an upper portion to define a gate height, and wherein the enhanced electrically conductive gate profile includes the upper portion extending further along the first axis than the base to define a non-uniform shape of the electrically conductive gate.
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Accused Products
Abstract
A semiconductor device is provided with an electrically conductive gate having an enhanced gate profile. The semiconductor device includes a semiconductor substrate that extends along a first axis to define a length and a second axis opposite the first axis to define a height. A channel region is interposed between opposing source/drain regions, and a gate stack is atop the semiconductor substrate. The gate stack includes an electrically conductive gate atop the channel region. The electrically conductive gate includes sidewalls extending between a base and an upper surface to define a gate height. A gate length of the electrically conductive gate continuously increases as the gate height increases from the base to the upper surface.
20 Citations
19 Claims
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1. A method of fabricating a semiconductor device including an enhanced electrically conductive gate profile, the method comprising:
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forming a semiconductor substrate that extends along a first axis to define a length and a second axis opposite the first axis to define a height; forming a sacrificial gate atop the semiconductor substrate, the sacrificial gate including a base portion formed on an upper surface of the semiconductor substrate and an upper surface portion located opposite the base portion; expanding the upper surface portion of the sacrificial gate with respect to the base portion to form an expanded sacrificial gate; removing the expanded sacrificial gate to form a gate trench including a base region having a first trench length and an upper surface region having a second trench length greater than the first trench length; and filling the gate trench with an electrically conductive material so as to form an electrically conductive gate having the enhanced electrically conductive gate profile, wherein the electrically conductive gate extends along the second axis between a base and an upper portion to define a gate height, and wherein the enhanced electrically conductive gate profile includes the upper portion extending further along the first axis than the base to define a non-uniform shape of the electrically conductive gate. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of enhancing a gate profile of an electrically conductive gate included in a field effect transistor (FET), the method comprising:
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forming a semiconductor substrate that extends along a first axis to define a length and a second axis opposite the first axis to define a height; forming a sacrificial gate atop the semiconductor substrate, the sacrificial gate having a thermal expansion coefficient that varies along the second axis between a base portion disposed on the semiconductor substrate and an upper surface portion of the sacrificial gate located opposite the base portion; annealing the sacrificial gate such that the upper surface portion expands along the first axis further than the base portion; and replacing the sacrificial gate with an electrically conductive gate including a base that extends along the first axis to define a first gate length and an upper surface that extends along the first axis to define as second gate length that is greater than the first gate length. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16)
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17. A semiconductor device including an electrically conductive gate having an enhanced gate profile, the semiconductor device comprising:
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a semiconductor substrate that extends along a first axis to define a length and a second axis opposite the first axis to define a height, the semiconductor substrate including a channel region interposed between opposing source/drain regions; a gate stack atop the semiconductor substrate, the gate stack including an electrically conductive gate atop the channel region, the electrically conductive gate including sidewalls extending between a base and an upper surface to define a gate height, wherein a gate length of the electrically conductive gate continuously increases non-uniformly as the gate height increases from the base to the upper surface. - View Dependent Claims (18, 19)
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Specification