Interposer and electrical testing method thereof

• US 9,991,178 B2
• Filed: 09/14/2012
• Issued: 06/05/2018
• Est. Priority Date: 03/22/2012
• Status: Active Grant

• Current Assignee: Siliconware Precision Industries Co., Ltd.
• Original Assignee: Siliconware Precision Industries Co., Ltd.
• Inventors: Chen, Lu-Yi, Chiu, Chi-Hsin, Chiu, Shih-Kuang
• Primary Examiner(s): Loke, Steven
• Assistant Examiner(s): Soderholm, Krista
• Application Number:
  US13/619,528
• Publication Number:
  US 20130249589A1
• Time in Patent Office: 2,090 Days
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence

Abstract

An interposer is provided which includes: a substrate having a first surface with a plurality of first conductive pads and a second surface opposite to the first surface, the second surface having a plurality of second conductive pads; a plurality of conductive through holes penetrating the first and second surfaces of the substrate and electrically connecting the first and second conductive pads; and a first removable electrical connection structure formed on the first surface and electrically connecting a portion of the first conductive pads so as to facilitate electrical testing of the interposer.

Claims

1. An interposer, comprising:

a substrate having a first surface with a plurality of first conductive pads and a second surface opposite to the first surface, the second surface having a plurality of second conductive pads;

a plurality of conductive through holes penetrating the first and second surfaces of the substrate and electrically connecting the first and second conductive pads; and

a first removable electrical connection structure formed on the first surface and electrically connected to at least two adjacent first conductive pads, wherein the first removable electrical connection structure is a metal layer or a wiring layer formed on the first conductive pads and the first surface.

2. The interposer of claim 1, wherein the first removable electrical connection structure is integrally formed with the first conductive pads.

3. The interposer of claim 1, wherein the first conductive pads further have a first under bump metallurgy (UBM) layer formed thereon, and the second conductive pads further have a second UBM layer formed thereon, such that the first removable electrical connection structure is interposed between the first conductive pads and the first UBM layer, and a second removable electrical connection structure is interposed between the second conductive pads and the second UBM layer.

4. The interposer of claim 1, wherein the first surface further has at least a first redistribution layer, and the second surface further has at least a second redistribution layer.

5. The interposer of claim 1, wherein the first surface further has at least a testing pad electrically connected to one of the first conductive pads.

6. The interposer of claim 1, further comprising a second removable electrical connection structure formed on the second surface and electrically connected to a portion of the second conductive pads, the first and second conductive pads, the first and second removable electrical connection structures, and the conductive through holes to form a daisy chain structure.

7. The interposer of claim 1, further comprising a plurality of conductive bumps disposed on the second conductive pads.

8. The interposer of claim 1, wherein the substrate is less than or equal to 200 um in thickness.