Display backplane, manufacturing method thereof and display device

• US 9,991,475 B2
• Filed: 08/13/2015
• Issued: 06/05/2018
• Est. Priority Date: 03/13/2015
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: Shen, Wulin, Yuan, Guangcai
• Primary Examiner(s): Malsawma, Lex
• Application Number:
  US14/906,500
• Publication Number:
  US 20170110681A1
• Time in Patent Office: 1,027 Days
• Field of Search: None
• CPC Class Codes: H10K 50/841 Self-supporting sealing arrangements
• CPC Class Codes: H10K 50/844 Encapsulations
• CPC Class Codes: H10K 50/87 Arrangements for heating or cooling
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 71/00 Manufacture or treatment specially adapted for the organic devices covered by this subclass

Abstract

The present invention provides a display backplane and a manufacturing method thereof, as well as a display device. The display backplane comprising: a substrate; an array of organic light emitting elements and an array of transistors for driving and controlling the array of organic light emitting elements formed on the substrate; and a heat insulation layer formed between the array of organic light emitting elements and the array of transistors, wherein the heat insulation layer is provided with a heat insulation layer via hole, through which the array of transistors is connected with the array of organic light emitting elements. The display backplane provided in the present invention can reduce the conduction of heat generated by the array of organic light emitting elements during lighting to the array of transistors, thus avoiding problems caused thereby such as uneven display.

Claims

1. A display backplane, comprising:

a substrate;

an array of organic light emitting elements and an array of transistors for driving and controlling the array of organic light emitting elements formed on the substrate; and

a heat insulation layer formed between the array of organic light emitting elements and the array of transistors, wherein

the heat insulation layer is provided with a heat insulation layer via hole, through which the array of transistors is connected with the array of organic light emitting elements, and

the display backplane further comprises;

a heat conduction layer formed on a side of the array of the organic light emitting elements away from the array of the transistors;

an encapsulation layer for encapsulating the substrate on which the array of organic light emitting elements and the array of transistors are formed, wherein the heat conduction layer is formed between the array of organic light emitting elements and the encapsulation layer;

a cover plate and a heat dissipation layer arranged on a side of the encapsulation layer away from the array of organic light emitting elements, wherein the cover plate is arranged between the heat dissipation layer and the encapsulation layer,

wherein the heat dissipation layer comprises a heat dissipation sheet and a heat dissipation pin, the heat dissipation pin being formed on a side of the heat dissipation sheet away from the cover plate.

2. The display backplane according to claim 1, further comprising:

a passivation layer formed between the array of organic light emitting elements and the array of transistors,

wherein the heat insulation layer is positioned between the passivation layer and the bottom electrode of the organic light emitting element in the array of organic light emitting elements;

wherein the passivation layer is provided with a passivation layer via hole formed therein, the position of which corresponds to that of the heat insulation layer via hole;

and wherein the drain of the transistor in the array of transistors is connected with the bottom electrode of the organic light emitting element in the array of organic light emitting elements via the passivation layer via hole and the heat insulation layer via hole.

3. The display backplane according to claim 2, wherein the slope angle of the heat insulation layer via hole is smaller than or equal to 60°

.

4. The display backplane according to claim 3, wherein the slope angle of the heat insulation layer via hole is 40-60°

.

5. The display backplane according to claim 1, wherein the slope angle of the heat insulation layer via hole is smaller than or equal to 60°

.

6. The display backplane according to claim 5, wherein the slope angle of the heat insulation layer via hole is 40-60°

.

7. A method for manufacturing a display backplane, comprising:

forming on a substrate an array of organic light emitting elements and an array of transistors for driving and controlling the array of organic light emitting elements; and

forming a heat insulation layer between the array of organic light emitting elements and the array of transistors, wherein

the heat insulation layer is provided with a heat insulation layer via hole formed therein, and wherein the array of transistors is connected with the array of organic light emitting elements through the insulation layer via hole, and

the method further comprises;

forming a heat conduction layer on a side of the array of organic light emitting elements away from the array of transistors;

forming a passivation layer between the array of organic light emitting elements and the array of transistors, wherein

the heat insulation layer is positioned between the passivation layer and the bottom electrode of the organic light emitting element in the array of organic light emitting elements; and

the passivation layer is provided with a passivation layer via hole formed therein, the position of which corresponds to that of the heat insulation layer via hole, and the drain of the transistor in the array of transistors is connected with the bottom electrode of the organic light emitting element in the array of organic light emitting elements via the passivation layer via hole and the heat insulation layer via hole,

wherein the step of forming the heat insulation layer comprises;

coating a mixed material of a heat insulation material and a photoresist onto the passivation layer; and

exposing and developing the mixed material coated onto the passivation layer using a photolithography process, to form a heat insulation layer provided with a heat insulation layer via hole.

8. The method according to claim 7, further comprising:

forming an encapsulation layer for encapsulating the substrate on which the array of organic light emitting elements and the array of transistors are formed;

wherein

the step of forming a heat conduction layer on a side of the array of organic light emitting elements away from the array of transistors comprises;

forming a heat conduction layer between the array of organic light emitting elements and the encapsulation layer.

9. The method according to claim 8, further comprising:

forming a cover plate and a heat dissipation layer on a side of the encapsulation layer away from the array of organic light emitting elements, wherein the cover plate is formed between the heat dissipation layer and the encapsulation layer.

10. A display device, comprising a display backplane, the display backplane comprising:

a substrate;

an array of organic light emitting elements and an array of transistors for driving and controlling the array of organic light emitting elements formed on the substrate; and

a heat insulation layer formed between the array of organic light emitting elements and the array of transistors, wherein

the heat insulation layer is provided with a heat insulation layer via hole, through which the array of transistors is connected with the array of organic light emitting elements, and

the display backplane further comprises;

a heat conduction layer formed on a side of the array of the organic light emitting elements away from the array of the transistors;

an encapsulation layer for encapsulating the substrate on which the array of organic light emitting elements and the array of transistors are formed, wherein the heat conduction layer is formed between the array of organic light emitting elements and the encapsulation layer;

a cover plate and a heat dissipation layer arranged on a side of the encapsulation layer away from the array of organic light emitting elements, wherein the cover plate is arranged between the heat dissipation layer and the encapsulation layer,

wherein the heat dissipation layer comprises a heat dissipation sheet and a heat dissipation pin, the heat dissipation pin being formed on a side of the heat dissipation sheet away from the cover plate.

11. The display device according to claim 10, wherein the display backplane further comprises:

a passivation layer formed between the array of organic light emitting elements and the array of transistors,

wherein the heat insulation layer is positioned between the passivation layer and the bottom electrode of the organic light emitting element in the array of organic light emitting elements;

wherein the passivation layer is provided with a passivation layer via hole formed therein, the position of which corresponds to that of the heat insulation layer via hole;

and wherein the drain of the transistor in the array of transistors is connected with the bottom electrode of the organic light emitting element in the array of organic light emitting elements via the passivation layer via hole and the heat insulation layer via hole.

12. The display device according to claim 10, wherein the slope angle of the heat insulation layer via hole is smaller than or equal to 60°

.