Universal computer architecture

• US RE43,619 E1
• Filed: 06/07/2002
• Issued: 08/28/2012
• Est. Priority Date: 08/11/2001
• Status: Active Grant

• Current Assignee: OL Security LLC (Intellectual Ventures LLC)
• Original Assignee: Ramsle Technology Group GmbH LLC (Intellectual Ventures LLC)
• Inventors: Newberry, Robert
• Primary Examiner(s): Hartman, Jr., Ronald
• Application Number:
  US12/231,867
• Time in Patent Office: 3,735 Days
• Field of Search: 700/1, 713/1, 713/100
• US Class Current: 700/86
• CPC Class Codes: N/A

Abstract

A universal computer for a vehicle, comprising a microprocessor for the processing of control programs, a storage unit, for the data thus calculated and an interface which permits a connection of the computer to a databus in the vehicle. The computer comprises control programs for controlling device provided in the vehicle, whereby the control commands are transmitted to the device to be controlled via device interfaces. The computer also comprises reconfigurable hardware, which permits a retroactive reconfiguration of peripheral components or an interface in the assembled state of the computer. A transmission of an algorithm for reconfiguration of the hardware is provided to the storage unit on the vehicle, so that a process for reconfiguration of the hardware associated with the peripheral components or the interface may be carried out.

Claims

1. A universal computer for a vehicle, said universal computer comprising:

a microprocessor for processing control programs;

a storage unit for data calculated during processing of the control programs;

an interface for connecting the computer to a vehicle data bus;

control programs for controlling devices provided in the vehicle, wherein control instructions are transmitted via device interfaces to the devices to be controlled;

reconfigurable hardware which permits subsequent reconfiguration of peripheral components or of an interface in an installed state of the computer;

transmission means which transmit an algorithm, for reconfiguring the hardware, to the storage unit whereby a process for reconfiguring the hardware with regard to the peripheral components or to the interface can be carried out;

a storage control unit which automatically transmits the algorithm for reconfiguring the hardware to the storage unit; and

a memory in which a plurality of data pages for configuring the hardware are stored, wherein only one of the data pages is classified as valid in a present device configuration and wherein the storage control unit retrieves applicable data pages during a reconfiguration.

2. The computer as claimed in claim 1, wherein the reconfigurable hardware has freely connectable memory cells with reconfigurable electrical connections which can be subsequently newly connected in accordance with the algorithm for reconfiguring the hardware in the installed state of the computer.

3. The computer as claimed in claim 1, wherein the reconfigurable hardware comprises a field programmable gate array.

4. The computer as claimed in claim 1, wherein the storage control unit transmits the algorithm for reconfiguring the hardware to the storage unit without affecting a processor time of the microprocessor.

5. The computer as claimed in claim 1, wherein the storage unit comprises a flash memory which is connected to a wireless interface via which the algorithm for reconfiguring the hardware can be transmitted into the flash memory.

6. The computer as claimed in claim 1, wherein part of the computer is composed of standard cell blocks which are embodied as reconfigurable hardware.

7. The computer as claimed in claim 6, wherein the microprocessor has standard cell blocks which can be wired via the reconfigurable hardware to an interface in a variable fashion.

8. The computer as claimed in claim 1, wherein data pages for the configuration of the hardware that is necessary for a device that is to be coupled externally to the device interfaces is stored in the form of a hardware description language for transmission to the computer in the device.

9. The computer as claimed in claim 8, wherein the device interface transmits the hardware description language for peripherals and interfaces of the computer to at least one of the computer and the storage control unit.

10. The computer as claimed in claim 1, wherein:

a storage control means is provided; and

a transmission safety means permits a transmission of an algorithm for reconfiguring the hardware, only after a check to determine whether a utilized method of data transmission is permissible in a present state of the vehicle or of the computer, and/or whether a sender is authorized to transmit a new algorithm for reconfiguring the hardware.

11. A method of reconfiguring a vehicular computer comprising:

receiving and storing hardware reconfiguration data in a vehicular control device configured for installation in a vehicle;

authorizing reception of the hardware configuration data; and

reconfiguring hardware of a bus interface to the vehicular control device according to the hardware reconfiguration data.

12. The method of claim 11 wherein authorizing the reception of the hardware reconfiguration data includes a positive encryption check.

13. The method of claim 11 wherein reconfiguring the hardware of the bus interface to the vehicular control device according to the reconfiguration data comprises altering data bus interface hardware of the vehicular control device.

14. The method of claim 11 wherein the hardware reconfiguration data is received via a wireless interface.

15. The method of claim 11 wherein the hardware reconfiguration data is in the form of a hardware description language.

16. A method of reconfiguring a vehicular computer comprising:

authorizing reception of hardware reconfiguration data, wherein the hardware reconfiguration data is associated with a plurality of hardware reconfiguration data sets;

storing the plurality of hardware reconfiguration data sets in a vehicular control device configured for installation in a vehicle;

selecting a hardware reconfiguration data set from the plurality of hardware reconfiguration data sets; and

reconfiguring hardware of a bus interface to the vehicular control device according to the selected reconfiguration data.

17. The method of claim 16 wherein selecting is performed by selecting a desired area of memory.

18. The method of claim 16 wherein the hardware configuration data sets comprise sets of instructions for programming digital logic functions.

19. The method of claim 16 wherein the hardware reconfiguration data is received via a wireless interface.