Use of voids between elements in semiconductor structures for isolation

Use of voids between elements in semiconductor structures for isolation

CN
  • CN 100,428,440 C
  • Filed: 05/03/2004
  • Issued: 10/22/2008
  • Est. Priority Date: 05/21/2003
  • Status: Active Grant
First Claim
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1. array of non-volatile memory cells that is formed on the semi-conductive substrate, it comprises:

  • An array by the charge storage cell of described substrate supporting;

    Many conductivity control gate line, it extends along the first direction across described charge storage cell, and spaced apart along a second direction, and its spacing distance equals the spacing distance of described charge storage cell along described second direction, described first direction and described second direction are orthogonalHierarchy comprising described at least charge storage cell and described control gate line is spaced apart along described second direction, and its spacing distance is less than 1/5th of the thickness of described hierarchy;

    WithAlong the dielectric material of described second direction between described hierarchy, it fills the top section in the space between the described hierarchy, stays the space simultaneously between each adjacent charge storage cell of described hierarchy,Wherein said charge storage cell is that conductivity floating grid and described control gate line extend downward along between each adjacent floating grid of described first direction.

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