Method for making semiconductor side wall fin

Method for making semiconductor side wall fin

  • CN 100,530,567 C
  • Filed: 10/18/2001
  • Issued: 08/19/2009
  • Est. Priority Date: 10/18/2000
  • Status: Active Grant
First Claim
Patent Images

1. method that forms FET dual gate comprises:

  • On substrate, form the monoxide layer;

    Form a silicon layer on described oxide skin(coating), described silicon layer has first side surface and second side surface;

    Epitaxial growth one etch stop layer on first side surface of described silicon layer;

    Epitaxial growth one raceway groove on described first etch stop layer, described raceway groove have one second sidewall away from a first side wall of described silicon layer first side surface and contiguous described silicon layer first side surface;

    Remove described silicon layer, remove described etch stop layer then, so that expose second sidewall of described raceway groove;

    Form source electrode and drain electrode, wherein a side surface of source electrode and drain electrode contacts the opposed end surface of epitaxially grown described raceway groove;

    AndForm grid, wherein the first side wall of the contiguous epitaxially grown described raceway groove of grid and second sidewall and with they insulation.

View all claims

    Thank you for your feedback