Scalable integrated logic and non-volatile memory

Scalable integrated logic and non-volatile memory

  • CN 101,061,585 A
  • Filed: 11/01/2005
  • Published: 10/24/2007
  • Est. Priority Date: 11/23/2004
  • Status: Active Application
First Claim
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1. scalable transistor, it comprises:

  • Substrate, it comprises a plurality of doped regions;

    Gate insulator, it is formed on the described substrate and is in fact between described a plurality of doped region;

    WithGate stack, it is formed on described gate insulator top and comprises;

    Metal nitride layer;

    Grid layer, it is formed on described metal nitride layer top;

    WithMetal silicide layer, it is formed on described grid layer top.

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