FPGA loading method and its equipment

FPGA loading method and its equipment

  • CN 101,127,027 A
  • Filed: 09/12/2007
  • Published: 02/20/2008
  • Est. Priority Date: 09/12/2007
  • Status: Active Application
First Claim
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1. a FPGA loading method is characterized in that, digital signal processor (11) may further comprise the steps by self synchronous serial interface and corresponding pin handover module (32) selection connection FPGA (12) or application device:

  • 1.1) in the FPGA load phase, switch described pin handover module (32) and connect FPGA, dispose and utilize described synchronous serial interface that FPGA (12) is carried out the passive serial mode and load;

    1.2) load finish after, switch described pin handover module (32) and connect application device, dispose and utilize described synchronous serial interface to finish concrete application.

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