Method of fabrication of AI/GE bonding in a wafer packaging environment and a product produced therefrom

Method of fabrication of AI/GE bonding in a wafer packaging environment and a product produced therefrom

  • CN 101,171,665 A
  • Filed: 03/09/2006
  • Published: 04/30/2008
  • Est. Priority Date: 03/18/2005
  • Status: Active Application
First Claim
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1. chip architecture, it comprises:

  • First substrate that comprises at least one MEMS feature, described first substrate comprises the roughly germanium layer that at least one is patterned;

    AndSecond substrate, described second substrate comprise roughly aluminium lamination and electric contact that at least one is patterned;

    Wherein described at least one patterned roughly germanium layer is bonded to described at least one patterned aluminium lamination to form firm electricity and mechanical contact.

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