Method and device for predecoding executive instruction

Method and device for predecoding executive instruction

  • CN 101,201,734 B
  • Filed: 11/14/2007
  • Issued: 07/13/2011
  • Est. Priority Date: 12/13/2006
  • Status: Active Grant
First Claim
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1. the method for the instruction that pre decoding is used to carry out in many kernel processes environment comprises:

  • Receiving first row that is used for by the first processor kernel is carried out by shared pre decoder instructs, wherein the first processor kernel comprises that the cascade that has at least the first execution pipeline and second execution pipeline postpones the execution pipeline unit, wherein, being sent to the instruction that cascade postpones in the common transmission group of execution pipeline unit was performed in first execution pipeline before instruction is performed in second execution pipeline;

    With shared pre decoder pre decoding is carried out in the first capable instruction;

    The first row instruction of pre decoding is sent to the first processor kernel so that postpone to carry out the execution pipeline in cascade from shared pre decoder;

    Receiving second row that is used for by second processor cores is carried out by shared pre decoder instructs;

    With shared pre decoder pre decoding is carried out in the second capable instruction;

    AndThe second row instruction of pre decoding is sent to second processor cores so that carry out from shared pre decoder.

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