High-speed, low-power input buffer for integrated circuit devices

High-speed, low-power input buffer for integrated circuit devices

  • CN 101,399,077 B
  • Filed: 07/19/2005
  • Issued: 03/11/2015
  • Est. Priority Date: 03/29/2005
  • Status: Active Grant
First Claim
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1. an integrated circuit input impact damper, is characterized in that it comprises:

  • One entry terminal, receives an input voltage signal;

    One outlet terminal, when this input buffer is in the operational phase, provides an output voltage signal, to respond this input voltage signal;

    AndOne reference voltage terminal, when this input buffer is in the optional operation calibration stage, provide a reference voltage signal toThis input buffer;

    When this input voltage level is higher than this reference voltage level, output node voltage quasi position drives as low;

    When this input voltage level is lower than this reference voltage level, output node voltage quasi position drives as high;

    This integrated circuit input impact damper, is characterized in that wherein said reference voltage terminal is couple to this input buffer,To respond one first calibrating signal;

    This integrated circuit input impact damper, is characterized in that wherein said entry terminal is couple to this input buffer, to respondOne second compensation calibration signal.

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