The remapping method of digital circuit and apparatus for generating relevant signal

The remapping method of digital circuit and apparatus for generating relevant signal

  • CN 101,409,542 B
  • Filed: 10/11/2007
  • Issued: 01/20/2016
  • Est. Priority Date: 10/11/2007
  • Status: Active Grant
First Claim
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1. a remapping method for digital circuit, includes:

  • One clock signal to digital circuit is provided;

    According to one first cue, maintain this clock signal in a logic level;

    In maintenance first schedule time of this clock signal after a logic level, produce a reset signal, reset this digital circuit, this reset signal continued for second schedule time;

    AndProducing the 3rd schedule time after described reset signal, according to one second cue, reply this clock signal;

    The time interval wherein between this first cue and this second cue produces a count value according to a counter and decides, and described 3rd schedule time is early than described second schedule time;

    Wherein, described clock signal is stopped according to the 3rd cue again through all after dates of a characteristic frequency;

    Further, via a period of time, described reset signal terminates, and after described digital circuit completes replacement action, then recovers described clock signal again according to the 4th cue.

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