Encoding method and device, and program
Encoding method and device, and program
 CN 101,420,231 A
 Filed: 10/27/2008
 Published: 04/29/2009
 Est. Priority Date: 10/25/2007
 Status: Active Application
First Claim
1. coding method, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described coding method may further comprise the steps:
 Derivation is near 2 ^{x}The reference integer I of (x=m/2, m are the integers more than or equal to
0);
Acquisition is describedly carried out division arithmetic and definite quotient and the remainder with reference to integer I to the numerical value of being represented by Bit String respectively by using;
AndThe variable length code of each merchant among the merchant of two successive bits strings of execution, combination are corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and the generation code word.
Chinese PRB Reexamination
Abstract
An encoding method for dividing a bit string of an input signal at a position of x bits from a least significant bit into a highorder bit string and a loworder bit string, performing variablelengthencoding of the highorder bit string, and performing fixedlengthencoding of the loworder bit string includes deriving a reference integer I close to 2 x (x = m/2, m is an integer of 0 or more); obtaining a quotient and a remainder that are determined by performing a dividing operation on numerical values represented respectively by the bit strings by using the reference integer I; and performing variablelengthencoding of each of quotients of two consecutive bit strings, combining remainders corresponding to the quotients and performing fixedlengthencoding of the result, and generating a codeword.

10 Citations
Energy losslessencoding method and apparatus, audio encoding method and apparatus, energy losslessdecoding method and apparatus, and audio decoding method and apparatus  
Patent #
US 10,878,827 B2
Filed 07/30/2019

Current Assignee
N/A

Method and apparatus for entropy coding of source samples with large alphabet  
Patent #
US 10,819,981 B2
Filed 06/26/2018

Current Assignee
N/A

Videofrequency compression method, decompression method, device, terminal and medium  
Patent #
CN 109,600,618 A
Filed 12/19/2018

Current Assignee

Energy lossless coding method and equipment and energy losslessly encoding method and equipment  
Patent #
CN 106,941,003 A
Filed 10/22/2012

Current Assignee

Data coding method, decoding method, coder and decoder  
Patent #
CN 101,980,464 A
Filed 09/30/2010

Current Assignee

Energy losslessencoding method and apparatus, audio encoding method and apparatus, energy losslessdecoding method and apparatus, and audio decoding method and apparatus  
Patent #
US 10,424,304 B2
Filed 04/15/2015

Current Assignee
N/A

The method and apparatus of the entropy code of source sample with big alphabet  
Patent #
CN 107,211,136 A
Filed 01/29/2016

Current Assignee

DATA ENCODING METHOD, DECODING METHOD, ENCODER AND DECODER  
Patent #
WO2011150810A1
Filed 05/30/2011

Current Assignee

ENERGY LOSSLESSENCODING METHOD AND APPARATUS, AUDIO ENCODING METHOD AND APPARATUS, ENERGY LOSSLESSDECODING METHOD AND APPARATUS, AND AUDIO DECODING METHOD AND APPARATUS  
Patent #
CN 104,025,190 A
Filed 10/22/2012

Current Assignee

Method and device for generating serial number with fixed length  
Patent #
CN 104,486,067 A
Filed 12/02/2014

Current Assignee

No References
24 Claims

1. coding method, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described coding method may further comprise the steps:

Derivation is near 2 ^{x}The reference integer I of (x=m/2, m are the integers more than or equal to
0);
Acquisition is describedly carried out division arithmetic and definite quotient and the remainder with reference to integer I to the numerical value of being represented by Bit String respectively by using;
AndThe variable length code of each merchant among the merchant of two successive bits strings of execution, combination are corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and the generation code word.


2. coding method as claimed in claim 1 wherein, in described acquisition step, be multiply by described numerical value and described reciprocal corresponding integer with reference to integer I.

3. coding method as claimed in claim 2, wherein, in described acquisition step, by use described come described merchant and described remainder carried out with reference to integer I proofread and correct.

4. coding method as claimed in claim 3, wherein, when amount of bits x is a decimal and greater than predetermined threshold X (X=M/2, M is a positive odd number) time, be set to x=X by amount of bits, described high order bit string is encoded, and by described loworder bit string manipulation is come described loworder bit string is carried out fixedlength code (FLC) for the data of (mM)/2 bit length.

5. coding method as claimed in claim 1 wherein, in described coding step, is made up described remainder based on following expression (1),
Q _{i}＝  q _{2i}+I·
q _{2i+1}????????(1)Wherein, Q _{i}Represent described combination remainder, and q _{2i}And q _{2i+1}The remainder of representing described two successive bits strings.
 q _{2i}+I·

6. coding method, be used at a distance of the position of x bit the Bit String of input signal being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described coding method may further comprise the steps:

Derivation is near 2 ^{x}The reference integer I of (x=m/n, m are the integers more than or equal to 0, and n is the integer more than or equal to
3);
Acquisition is describedly carried out division arithmetic and definite quotient and the remainder with reference to integer I to the numerical value of being represented by Bit String respectively by using;
AndThe variable length code of each merchant among the merchant of n successive bits string of execution, combination are corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and the generation code word.


7. encoding device, be used at a distance of the position of x bit the Bit String of input signal being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described encoding device comprises:

Derive parts, be used for deriving near 2 ^{x}The reference integer I of (x=m/2, m are the integers more than or equal to
0);
Obtain parts, be used to obtain describedly the numerical value of being represented by Bit String is carried out division arithmetic and definite quotient and the remainder with reference to integer I by using;
AndAddressable part is used for carrying out the merchant'"'"'s of two successive bits strings each merchant'"'"'s variable length code, and combination is corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and produces code word.


8. encoding device, be used at a distance of the position of x bit the Bit String of input signal being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described encoding device comprises:

Derive parts, be used for deriving near 2 ^{x}The reference integer I of (x=m/n, m are the integers more than or equal to 0, and n is the integer more than or equal to
3);
Obtain parts, be used to obtain by use described with reference to integer I removes the numerical value represented by Bit String definite quotient and the remainder;
AndAddressable part is used for carrying out the merchant'"'"'s of n successive bits string each merchant'"'"'s variable length code, and combination is corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and produces code word.


9. program, be used to make computer carry out following processing:
 at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described processing may further comprise the steps;
Derivation is near 2 ^{x}The reference integer I of (x=m/2, m are the integers more than or equal to
0);
Acquisition by use described with reference to integer I come to remove the numerical value represented by Bit String definite quotient and the remainder;
AndThe variable length code of each merchant among the merchant of two successive bits strings of execution, combination are corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and the generation code word.
 at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described processing may further comprise the steps;

10. program, be used to make computer carry out following processing:
 at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described processing may further comprise the steps;
Derivation is near 2 ^{x}The reference integer I of (x=m/n, m are the integers more than or equal to 0, and n is the integer more than or equal to
3);
Acquisition is describedly carried out division arithmetic and definite quotient and the remainder with reference to integer I to the numerical value of being represented by Bit String respectively by using;
AndThe variable length code of each merchant among the merchant of n successive bits string of execution, combination are corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and the generation code word.
 at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described processing may further comprise the steps;

11. the coding/decoding method of the code word that is used to decode, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described coding/decoding method may further comprise the steps:

From described code word, decode merchant and combination remainder, described merchant obtains each numerical value execution division arithmetic in the numerical value of being represented respectively by two successive bits strings by using with reference to integer I, and has made up the remainder corresponding to described merchant in described combination remainder; Derive described based on amount of bits x (x=m/2, m are the integers more than or equal to
0) with reference to integer I;With reference to integer I described combination remainder is divided into two remainders based on described;
AndBy with described merchant and describedly multiply each other and by adding that to the result remainder corresponding to described merchant produces Bit String with reference to integer I.


12. coding/decoding method as claimed in claim 11 wherein, in described remainder partiting step, multiply by described combination remainder and described reciprocal corresponding integer with reference to integer I.

13. coding/decoding method as claimed in claim 12, wherein, in described remainder partiting step, by use described come each remainder carried out with reference to integer I proofread and correct.

14. coding/decoding method as claimed in claim 13, wherein, when amount of bits x is a decimal and greater than predetermined threshold X (X=M/2, M is a positive odd number) time, be set to x=X by amount of bits, produce the high order bit string, the data of (mM)/2 bit length are carried out the regular length decoding, produce the loworder bit string.

15. coding/decoding method as claimed in claim 11 wherein, in described remainder partiting step, is divided described combination remainder based on following expression (2),

16. the coding/decoding method of the code word that is used to decode, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described coding/decoding method may further comprise the steps:

From described code word, decode merchant and combination remainder, described merchant obtains each numerical value execution division arithmetic in the numerical value of being represented respectively by the individual successive bits string of n (n is the integer more than or equal to
3) by using with reference to integer I, has made up the remainder corresponding to described merchant in described combination remainder;
Quantity x (x=m/n, m are natural numbers) based on bit derives described with reference to integer I;Derive described based on amount of bits x (x=m/n, m are natural numbers) with reference to integer I; With reference to integer I described combination remainder is divided into n remainder based on described;
AndBy with described merchant and describedly multiply each other and by adding that to the result remainder corresponding to described merchant produces Bit String with reference to integer I.


17. the decoding device of the code word that is used to decode, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described decoding device comprises:

The decoding parts, be used for decoding merchant and combination remainder from described code word, described merchant obtains each numerical value execution division arithmetic in the numerical value of being represented respectively by two successive bits strings by using with reference to integer I, has made up the remainder corresponding to described merchant in described combination remainder; Derive parts, be used for deriving described with reference to integer I based on amount of bits x (x=m/2, m are the integers more than or equal to
0);Remainder is divided parts, is used for reference to integer I described combination remainder being divided into two remainders based on described;
AndProduction part is used for by with described merchant and describedly multiply each other and by adding that to the result remainder corresponding to described merchant produces Bit String with reference to integer I.


18. the decoding device of the code word that is used to decode, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described decoding device comprises:

The decoding parts, be used for decoding merchant and combination remainder from described code word, described merchant obtains each numerical value execution division arithmetic in the numerical value of being represented respectively by the individual successive bits string of n (n is the integer more than or equal to
3) by using with reference to integer I, has made up the remainder corresponding to described merchant in described combination remainder;Derive parts, be used for deriving described with reference to integer I based on amount of bits x (x=m/n, m are the integers more than or equal to
0);Remainder is divided parts, is used for reference to integer I described combination remainder being divided into n remainder based on described;
AndProduction part is used for by with described merchant and describedly multiply each other and by adding that to the result remainder corresponding to described merchant produces Bit String with reference to integer I.


19. program, be used to make computer to carry out following processing:
 the decoding code word, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described processing may further comprise the steps;
From described code word, decode merchant and combination remainder, described merchant obtains each numerical value execution division arithmetic in the numerical value of being represented respectively by two successive bits strings by using with reference to integer I, has made up the remainder corresponding to described merchant in described combination remainder; Derive described based on amount of bits x (x=m/2, m are the integers more than or equal to
0) with reference to integer I;With reference to integer I described combination remainder is divided into two remainders based on described;
AndBy with described merchant and describedly multiply each other and by adding that to the result remainder corresponding to described merchant produces Bit String with reference to integer I.
 the decoding code word, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described processing may further comprise the steps;

20. program, be used to make computer to carry out following processing:
 the decoding code word, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described processing may further comprise the steps;
From described code word, decode merchant and combination remainder, described merchant obtains each numerical value execution division arithmetic in the numerical value of being represented respectively by the individual successive bits string of n (n is the integer more than or equal to
3) by using with reference to integer I, has made up the remainder corresponding to described merchant in described combination remainder;Derive described based on amount of bits x (x=m/n, m are the integers more than or equal to
0) with reference to integer I;With reference to integer I described combination remainder is divided into n remainder based on described;
And,By with described merchant and describedly multiply each other and by adding that to the result remainder corresponding to described merchant produces Bit String with reference to integer I.
 the decoding code word, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described processing may further comprise the steps;

21. encoding device, be used at a distance of the position of x bit the Bit String of input signal being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described encoding device comprises:

Leadout unit, being configured to derives near 2 ^{x}The reference integer I of (x=m/2, m are the integers more than or equal to
0);
Obtain the unit, be configured to obtain describedly the numerical value of being represented by Bit String is carried out division arithmetic and definite quotient and the remainder with reference to integer I by using;
AndCoding unit is configured to carry out the variable length code of each merchant among the merchant of two successive bits strings, and combination is corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and produces code word.


22. encoding device, be used at a distance of the position of x bit the Bit String of input signal being divided into high order bit string and loworder bit string with minimum effective bit, carry out the variable length code of described high order bit string, and carry out the fixedlength code (FLC) of described loworder bit string, described encoding device comprises:

Leadout unit, being configured to derives near 2 ^{x}The reference integer I of (x=m/n, m are the integers more than or equal to 0, and n is the integer more than or equal to
3);
Obtain the unit, be configured to obtain by use described with reference to integer I removes the numerical value represented by Bit String definite quotient and the remainder;
AndCoding unit is configured to carry out the variable length code of each merchant among the merchant of n successive bits string, and combination is corresponding to the fixedlength code (FLC) of described merchant'"'"'s remainder and execution result, and produces code word.


23. the decoding device of the code word that is used to decode, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described decoding device comprises:

Decoding unit, be configured to from described code word, decode merchant and combination remainder, described merchant obtains each numerical value execution division arithmetic in the numerical value of being represented respectively by two successive bits strings by using with reference to integer I, has made up the remainder corresponding to described merchant in described combination remainder; Leadout unit, being configured to derives described with reference to integer I based on amount of bits x (x=m/2, m are the integers more than or equal to
0);The remainder division unit is configured to reference to integer I described combination remainder is divided into two remainders based on described;
AndGeneration unit is configured to by with described merchant and describedly multiply each other and by adding that to the result remainder corresponding to described merchant produces Bit String with reference to integer I.


24. the decoding device of the code word that is used to decode, in described code word, at a distance of the position of x bit the Bit String of input signal is being divided into high order bit string and loworder bit string with minimum effective bit, described high order bit string has been carried out variable length code, and described loworder bit string has been carried out fixedlength code (FLC), and described decoding device comprises:

Decoding unit, be configured to from described code word, decode merchant and combination remainder, described merchant obtains each numerical value execution division arithmetic in the numerical value of being represented respectively by the individual successive bits string of n (n is the integer more than or equal to
3) by using with reference to integer I, has made up the remainder corresponding to described merchant in described combination remainder;Leadout unit, being configured to derives described with reference to integer I based on amount of bits x (x=m/n, m are the integers more than or equal to
0);The remainder division unit is configured to reference to integer I described combination remainder is divided into n remainder based on described;
AndGeneration unit is configured to by with described merchant and describedly multiply each other and by adding that to the result remainder corresponding to described merchant produces Bit String with reference to integer I.

Specification(s)