Variable rate coding for forward link

Variable rate coding for forward link

  • CN 101,534,169 B
  • Filed: 11/16/2000
  • Issued: 06/08/2016
  • Est. Priority Date: 11/22/1999
  • Status: Active Grant
First Claim
Patent Images

1. the communication channel circuit in base station processor, comprises:

  • Framer (40), arrange to receive data and the load data of input is packaged into one or more frame, wherein said one or more frame each includes multiple symbol that is encoded, and the forward error correction FEC encoding scheme that the input figure place being often encoded the load data of the input of symbol is selected by capacity management circuit is determined;

    Forward error correction FEC encoder (42), is arranged to encode the plurality of frame to comprise error correcting code so that the result number of output symbol keeps fixing;

    Demultiplexer (44), is arranged to accept the signal by the generation of described forward error correction FEC encoder and be fed to multiple expanded circuit and channel modulator;

    Multiple expanded circuit (46) and channel modulator (48), wherein said channel modulator be arranged to according to multiple access modulation technique modulate described output symbol with produce modulation be encoded signal;

    Adder (50), is arranged to be added the signal that is encoded of the described modulation from described channel modulator together with the pilot channel signal being guided circuit (32) to produce by the channel in described base station processor and the paging signal produced by the paging channel circuit (34) in described base station processor;

    Radio-frequency-up-converter (52), is arranged to transmit the output of described adder (50).

View all claims
    ×
    ×

    Thank you for your feedback

    ×
    ×