The manufacture method of semiconductor device

The manufacture method of semiconductor device

  • CN 101,728,277 B
  • Filed: 10/23/2009
  • Issued: 12/21/2016
  • Est. Priority Date: 10/24/2008
  • Status: Active Grant
First Claim
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1. a manufacture method for semiconductor device, including:

  • The substrate have insulating surface is formed grid electrode layer;

    Described grid electrode layer is formed gate insulator;

    Under the atmosphere comprising argon, on described gate insulator, carry out inverse splash process;

    After described gate insulator carries out inverse splash process, described gate insulator is formed the first oxide and partly leadsBody film;

    After forming described first oxide semiconductor film, in the case of being not exposed to air, at described first oxideThe second oxide semiconductor film, described first oxide semiconductor film and described second oxide semiconductor is formed on semiconductor filmFilm utilizes non-single crystalline film based on In-Ga-Zn-O to be formed;

    Described second oxide semiconductor film is formed conducting film;

    In described gate insulator, described first oxide semiconductor film, described second oxide semiconductor film and described conductionThe first mask layer is formed on film;

    Described first mask layer is utilized to carry out the first etching, to etch described first oxide semiconductor film, described second oxidationThing semiconductor film and described conducting film, thus form the first oxide semiconductor layer, the second oxide semiconductor layer and conductive layer;

    The second mask layer is formed by being ashed described first mask layer;

    AndDescribed second mask layer is utilized to carry out the second etching, to etch described first oxide semiconductor layer, described second oxidationThing semiconductor layer and described conductive layer, thus formed and there is the oxide semiconductor layer of depression, source region, drain region, sourcePole electrode layer and drain electrode layer,Wherein said first mask layer utilizes exposed mask to be formed,Wherein said first etching is inductively coupled plasma etching,Wherein said second etching is the wet etching using etchant,The wherein said end with the oxide semiconductor layer of depression, described source electrode layer and described drain electrode layer hasCurvature, andThe wherein said oxide semiconductor layer with depression includes that thickness ratio is heavy with described source region or described drain regionThe region that folded region is little.

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