Method for working out power system node impedance matrix through factor table method based on symmetrical sparse matrix technology
Method for working out power system node impedance matrix through factor table method based on symmetrical sparse matrix technology
 CN 104,715,422 A
 Filed: 01/20/2015
 Published: 06/17/2015
 Est. Priority Date: 01/20/2015
 Status: Active Application
First Claim
1. ask for a method for electric system nodal impedance matrix based on the factor table method of symmetrical and sparse technology, its feature comprises the following steps:
 Step 1;
read in each circuit branch data of n node system;
Step 2;
form bus admittance matrix Y;
Step 3;
Gaussian elimination computing is carried out to Y battle array obtain factor table according to symmetry is openness, and the position of nonzero element in triangle on packing factor table;
Step 4;
according to triangle U on factor table _{ij}the openness of element asks Z _{k}battle array diagonal element Z _{kk}and above element, and ask diagonal element Z according to symmetry _{kk}with the offdiagonal element on a left side;
Step 5;
by Z battle array write data file.
Chinese PRB Reexamination
Abstract
The invention provides a method for working out a power system node impedance matrix through a factor table method based on a symmetrical sparse matrix technology, and belongs to the field of power system analysis and computation. The method mainly includes the following steps that data files are read; a node admittance matrix Y is formed; normalization and element elimination are conducted on the matrix Y according to symmetrical sparse performance to obtain a factor table only containing elements D and elements U, and the positions of the nonzero U elements are recorded; the diagonal element Zkk and elements above the Zkk of a matrix Zk are worked out according to sparsity back subsitutition of the elements U; the elements on the left portion of the Zkk are worked out according to symmetry; data of a matrix Z are written into the data files. According to the method, the factor table only containing the elements D and the elements U is formed fast for the matrix Y in a symmetric sparse mode, and subsequent corresponding forward substitution and back substitution are completed; back substitution is conducted in a symmetrical mode according to the structural characteristics of the E elements of a unit matrix and the sparsity of the elements U to work out the elements of the matrix Zk, and the back substitution speed is greatly increased. When the method is adopted to conduct checking computation on an IEEE30 node system, or an IEEE57 node system or an IEEE118 node system, compared with a traditional factor table method, the computing speed can be increased by about 84%98%.

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Current Assignee

1 Claim

1. ask for a method for electric system nodal impedance matrix based on the factor table method of symmetrical and sparse technology, its feature comprises the following steps:

Step 1;
read in each circuit branch data of n node system;Step 2;
form bus admittance matrix Y;Step 3;
Gaussian elimination computing is carried out to Y battle array obtain factor table according to symmetry is openness, and the position of nonzero element in triangle on packing factor table;Step 4;
according to triangle U on factor table _{ij}the openness of element asks Z _{k}battle array diagonal element Z _{kk}and above element, and ask diagonal element Z according to symmetry _{kk}with the offdiagonal element on a left side;
Step 5;
by Z battle array write data file.

Specification(s)