Chip packing-body and manufacture method thereof

Chip packing-body and manufacture method thereof

  • CN 101,996,953 B
  • Filed: 08/10/2010
  • Issued: 03/02/2016
  • Est. Priority Date: 08/19/2009
  • Status: Active Grant
First Claim
Patent Images

1. a chip packing-body, comprising:

  • Semiconductor substrate, has contrary first surface and second surface, and at least one element region with around at least one connection pad district of this at least one element region;

    Multiple conductive pad structure, is positioned at the first surface of this semiconductor substrate, and is positioned in this connection pad district of this semiconductor substrate;

    Multiple mutually isolated heavily doped region, is located at below those conductive pad structures, and is electrically connected with those conductive pad structures, and wherein those heavily doped regions are arranged in this semiconductor substrate;

    Multiple opening, is goed deep in this semiconductor substrate by the second surface of this semiconductor substrate to expose those heavily doped regions;

    Conductive pattern, is positioned at those openings and those heavily doped regions in electrical contact;

    AndMultiple conductive projection, is located at below those heavily doped regions, and to be formed with those conductive pad structures via those heavily doped regions and be electrically connected,Wherein isolated by an insulation wall between those heavily doped regions, and wherein this conductive pattern gos deep in this heavily doped region,Wherein each described opening only exposes a heavily doped region.

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