Device using single metalized pad

Device using single metalized pad

  • CN 101,996,993 A
  • Filed: 08/13/2009
  • Published: 03/30/2011
  • Est. Priority Date: 08/13/2009
  • Status: Active Application
First Claim
Patent Images

1. integrated circuit (IC)-components comprises:

  • Semiconductor substrate;

    Be formed on a plurality of active MOS device on the described Semiconductor substrate;

    Overlie the interlevel dielectric layer of described a plurality of active MOS devices;

    The metal level of at least six patternings that in described interlevel dielectric layer, form;

    Be formed on the described interlevel dielectric layer and at least one described active device directly above at least one single metal pad;

    Be formed on the passivation layer with an opening of the top of described at least one single metal pad;

    Nothing buffering metal level zone between described a plurality of active MOS device and described at least one single metal pad, described nothing buffering metal level zone is among whole described interlevel dielectric layer;

    Wherein, below described single metal pad, described interlevel dielectric layer does not contain described buffering metal level substantially.

View all claims
    ×
    ×

    Thank you for your feedback

    ×
    ×