Substrate with embedded patterned capacitance

Substrate with embedded patterned capacitance

  • CN 102,105,955 A
  • Filed: 07/28/2009
  • Published: 06/22/2011
  • Est. Priority Date: 07/28/2008
  • Status: Active Application
First Claim
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1. processing that is used to form laminate, described laminate has electric capacity, and this processing comprises step:

  • Substrate is provided;

    Laminated conductive foil on described substrate, wherein said conductive foil comprises dielectric;

    In described dielectric at least one separate areas, form conductive layer, thereby form at least one discrete cathode zone;

    Process described conductive foil so that at least one zone that comprises described cathode zone of described conductive foil isolates with other conductive foil electricity.

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