Method and apparatus for dithering in multi-bit sigma-delta digital-to-analog converters

Method and apparatus for dithering in multi-bit sigma-delta digital-to-analog converters

  • CN 102,119,489 A
  • Filed: 10/22/2009
  • Published: 07/06/2011
  • Est. Priority Date: 10/23/2008
  • Status: Active Grant
First Claim
Patent Images

1. one kind is used for by making digital dither signal reduce the equipment of undesired idle tone in multidigit (M position, M>

  • 1) ∑



    D/A (DAC), and it comprises;





    multidigit modulator, it has digital signal input and variable-resolution output, and described ∑



    multidigit modulator comprises;

    Digital loop filters,Random sequence generator, andThe variable resolution quantisation device,WhereinDescribed digital loop filters converts the L bit digital word at described digital signal input receiving digital signals and with described digital signal,Described random sequence generator is created a plurality of random number N (n) that are sequence form, wherein N (n) be between 1 and M between random integers, andDescribed variable resolution quantisation device is reduced to N (n) bit digital word with described L bit digital word and adds zero to form the M bit digital word then for described N (n) bit digital word, and wherein M is zero greater than the individual least significant bit of M-N (n) of N (n) and described M bit digital word;

    Multidigit D/A (DAC), it has simulation output and is coupled to the numeral input of exporting from the described variable-resolution of described ∑



    multidigit modulator;

    AndSimulation low-pass filter, it has the analog input of the described simulation output of being coupled to described multidigit DAC.

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