There is the method forming pad in the wafer of three-dimensional stacking structure

There is the method forming pad in the wafer of three-dimensional stacking structure

  • CN 102,163,566 B
  • Filed: 02/21/2011
  • Issued: 06/08/2016
  • Est. Priority Date: 02/22/2010
  • Status: Active Grant
First Claim
Patent Images

1. by together with device wafer is laminated to processed wafer in the vertical direction thus there is the method forming pad in the wafer of three-dimensional stacking structure, comprising:

  • A () first technique, in conjunction with described device wafer and described processed wafer;

    B () the 2nd technique, makes the back-thinned of the Si substrate being formed on described device wafer after described first technique, wherein said Si substrate is thinning together with the super-contact body through whole described Si substrate;

    C () the 3rd technique, after described 2nd technique, forms anti-reflecting layer with the back side towards described Si substrate on described Si substrate, and form PMD dielectric layer at the back side of described anti-reflecting layer;

    D () the 4th technique, after described 3rd technique, at the back side of described super-contact body, forms through hole through described anti-reflecting layer and described PMD dielectric layer and is filled in by metallic substance in described through hole;

    AndE () the 5th technique, after described 4th technique, forms pad so that described pad is electrically connected with the back side of described through hole at the back side of described PMD dielectric layer.

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