Semiconductor packaging structure

Semiconductor packaging structure

  • CN 102,263,079 A
  • Filed: 07/18/2011
  • Published: 11/30/2011
  • Est. Priority Date: 07/18/2011
  • Status: Active Application
First Claim
Patent Images

1. semiconductor package comprises:

  • Carrier comprises;

    Chip carrier;

    A plurality of joint pins, around this chip carrier configuration, each engages pin and has first inner surface respect to one another and first outer surface;

    AndStrengthen pin, around this chip carrier configuration, this reinforcement pin has second inner surface respect to one another and second outer surface, and this surface area of strengthening this second outer surface of pin engages the surface area of this first outer surface of pin greater than each;

    Chip is disposed on this chip carrier of this carrier;

    Many bonding wires are disposed between this chip and these a plurality of these a plurality of first inner surfaces that engage pin and between this second inner surface of this chip and this reinforcement pin;

    AndPacking colloid, coat these a plurality of first inner surfaces of this chip, these a plurality of bonding wires, these a plurality of joint pins and this second inner surface of this reinforcement pin, and expose these a plurality of first outer surfaces of these a plurality of joint pins and this second outer surface of this reinforcement pin.

View all claims
    ×
    ×

    Thank you for your feedback

    ×
    ×