Cell structure for dual-port sram

Cell structure for dual-port sram

  • CN 102,298,963 A
  • Filed: 11/22/2010
  • Published: 12/28/2011
  • Est. Priority Date: 06/25/2010
  • Status: Active Application
First Claim
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1. a static RAM (SRAM) unit comprises:

  • First phase inverter and second phase inverter, this first phase inverter and this second phase inverter cross-couplings are in order to data storage, and each phase inverter comprises a drawing upwardly device and a plurality of pull device;

    A plurality of trench gate devices, itself and above-mentioned two cross-linked these first are in the same place with this second inverter configuration;

    AndAt least two ports, itself and the coupling of a plurality of trench gate device are in order to read and to write, wherein;

    Each drawing upwardly device, pull device and trench gate device comprise a fin formula field-effect transistor (FinFET),In the sram cell in the quantity of pull device and the sram cell ratio between the quantity of trench gate device greater than 1, andThe quantity of fin formula field-effect transistor is equal to or greater than 12 in the sram cell.

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