Packaging and testing method

Packaging and testing method

  • CN 103,730,376 B
  • Filed: 10/15/2012
  • Issued: 04/03/2018
  • Est. Priority Date: 10/15/2012
  • Status: Active Grant
First Claim
Patent Images

1. a kind of packaging and testing method, suitable for testing semiconductor encapsulation unit, including:

  • The semiconductor packages unit is provided, the semiconductor packages unit includes a packing colloid, a lead frame and multiple Cutting Roads,The multiple Cutting Road has in defining multiple semiconductor encapsulated elements, each semiconductor encapsulated element on semiconductor packages unitMultiple external connection terminals, on the lead frame;

    The lead frame is cut off along the multiple Cutting Road, so that the multiple semiconductor encapsulated element is electrically insulated from, andThe packing colloid is across the multiple Cutting Road;

    The semiconductor packages unit is placed on a carrying wafer, wherein the semiconductor packages unit is with least one positioningHole, and the carrying wafer has that at least the corresponding at least locating dowel of a positioning hole, an at least locating dowel enter this extremely with thisLack a positioning hole and be fitted together to each other;

    The semiconductor packages unit is sent to by a tester table with the carrying wafer, the tester table has a probe card;

    Probe card is set to make the multiple spies of probe card possessed close to the semiconductor packages unit being placed on the carrying waferPin terminal is in contact with the external connection terminals respectively, to test the respectively semiconductor encapsulated element, the wherein probe cardPost also is compressed with multiple, it is the multiple to compress post when the multiple probe terminals contact with the external connection terminals respectivelyThe center of the respectively semiconductor encapsulated element is compressed respectively;

    Labeled test result is abnormal the multiple semiconductor encapsulated element;

    The multiple semiconductor encapsulated element of singulation;

    AndRemoval is marked as abnormal the multiple semiconductor encapsulated element;

    Wherein respectively the semiconductor encapsulated element is a small size leadless packages element.

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