Offset integrated circuit packaging interconnects

Offset integrated circuit packaging interconnects

  • CN 103,839,911 A
  • Filed: 11/21/2013
  • Published: 06/04/2014
  • Est. Priority Date: 11/21/2012
  • Status: Active Application
First Claim
Patent Images

1. an integrated antenna package, comprising:

  • Substrate, it has the first thermal coefficient of expansion and comprises the interconnection of more than first on the first surface that is arranged in described substrate;

    Integrated circuit die, it has the second thermal coefficient of expansion and comprises the interconnection of more than second on the first surface that is arranged in described integrated circuit die;

    AndMultiple solder tappet structures, described more than first interconnection are coupled to described more than second interconnection by it,Wherein said more than first interconnection configuration is roughly to align with described more than second interconnection during to the first temperature in the about scope of-100 DEG C in about 0 DEG C when described integrated antenna package, andDescribed more than first interconnection configuration is when described integrated antenna package is during in temperature higher than described the first temperature and described more than second interconnection biasings.

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