Semiconductor structure and forming method thereof

Semiconductor structure and forming method thereof

  • CN 105,702,630 B
  • Filed: 11/26/2014
  • Issued: 07/10/2020
  • Est. Priority Date: 11/26/2014
  • Status: Active Grant
First Claim
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1. A method of forming a semiconductor structure, comprising:

  • providing a substrate and an etching stop layer covering the surface of the substrate, wherein the substrate is internally provided with a plurality of discrete bottom metal layers;

    etching the etching stop layer to form a groove exposing the surface of the bottom metal layer;

    forming an electric connection layer filled in the groove by adopting a self-aligned growth process, wherein the electric connection layer is electrically connected with the bottom metal layer;

    forming a plurality of discrete first graphene layers, a storage medium layer positioned on the surface of the first graphene layers and a second graphene layer positioned on the surface of the storage medium layer, wherein the first graphene layers are positioned on the surface of the electric connection layer and the surface of part of the etching stop layer;

    the first graphene layer, the electrical connection layer and the bottom metal layer are used as a lower electrode of the semiconductor structure together, and the second graphene layer is used as an upper electrode of the semiconductor structure;

    the first graphene layer is used as a part of the lower electrode, and the second graphene layer is used as the upper electrode, so that the defect that the resistance of an electric connection layer formed by a self-alignment process is large is overcome.

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