Linear voltage-controlled current source topological structure and solar array simulator

Linear voltage-controlled current source topological structure and solar array simulator

  • CN 107,037,852 B
  • Filed: 06/06/2017
  • Issued: 01/15/2021
  • Est. Priority Date: 06/06/2017
  • Status: Active Grant
First Claim
Patent Images

1. A linear voltage-controlled current source topology structure applied to a solar array simulator is characterized by comprising:

  • the three-port linear power composite transistor is formed by cascading a plurality of N-channel normally-open JFETs and N-channel normally-closed MOSFETs, controls all the transistors to work in a linear saturation region and equivalently serves as a variable resistor;

    the three-port linear power composite transistor is composed of an N-channel normally-closed MOSFET serving as a lowest-end power transistor M of a cascade branch circuit and a plurality of N-channel normally-open JFETs of the same type and cascaded with the M;

    the grid electrode between every two JFETs is connected with the source electrode of the upper end adjacent JFET through voltage-stabilizing tubes with the same type;

    and a current limiting resistor is connected between the voltage stabilizing tube and the source electrode of the corresponding JFET.

View all claims
    ×
    ×

    Thank you for your feedback

    ×
    ×