Synchronous random semiconductor memory

Synchronous random semiconductor memory

  • CN 1,326,150 C
  • Filed: 04/06/1999
  • Issued: 07/11/2007
  • Est. Priority Date: 08/04/1998
  • Status: Active Grant
First Claim
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1. semiconductor storage unit with external timing signal synchronous operation comprises:

  • The memory cell array that comprises a plurality of storage unit of storage data position;

    First internal address generator of response external address produces a series of first home addresses that are used for read operation;

    Second internal address generator of response external address produces a series of second home addresses that are used for write operation;

    Be used to select the address selector of the output of one of first and second internal address generators;

    Response external applies the controller that the read and write command information is controlled the operation of first and second internal address generators and address selector;

    WithBe used for the address decoder of the output of decode address selector switch with select storage unit.

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