Method and appts. for reducing back-to-back voltage glitch on high speed data bus

Method and appts. for reducing back-to-back voltage glitch on high speed data bus

  • CN 1,432,157 A
  • Filed: 03/13/2001
  • Published: 07/23/2003
  • Est. Priority Date: 03/31/2000
  • Status: Abandoned Application
First Claim
Patent Images

1. device comprises:

  • A drive circuit that comprises a driver transistor, this driver transistor comprise a gate terminal;

    AndA pre-driver circuit, it is accepted a logic high input voltage and transmits the gate terminal of the logic high voltage of a minimizing to this driver transistor.

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