Method for forming a flip chip on leadframe semiconductor package

Method for forming a flip chip on leadframe semiconductor package

  • CN 1,486,510 A
  • Filed: 08/20/2002
  • Published: 03/31/2004
  • Est. Priority Date: 08/21/2001
  • Status: Active Application
First Claim
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1. method that is used to form flip chip semiconductor package, this method may further comprise the steps:

  • A) provide the patterned layer of metallic conductor, this metallic conductor has the first surface that is used for providing the interconnect location figure thereon;

    B) provide semiconductor element, this semiconductor element have with its on the corresponding first surface of land pattern, have the material that can not reflux on the pad;

    C) electric conducting material that refluxes of layout scheduled volume on the material that can not reflux;

    D) semiconductor element is placed on the patterned layer of metallic conductor, wherein the electric conducting material that can reflux adjoins interconnect location;

    AndE) electric conducting material that refluxes and can reflux, wherein the major part of the electric conducting material that can reflux remains essentially in interconnect locations, to form conductive interconnection between material that can not reflux and interconnect location.

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