High performance content alteration architecture and techniques

High performance content alteration architecture and techniques

  • CN 1,677,306 A
  • Filed: 03/31/2005
  • Published: 10/05/2005
  • Est. Priority Date: 03/31/2004
  • Status: Active Application
First Claim
Patent Images

1. high-performance HIP generation system comprises:

  • Store the character high-speed cache component of a plurality of characters and store in the camber speed buffer memory component of a plurality of arcs at least one;

    Store the warped regions high-speed cache component of precalculated warped regions, wherein, described precalculated warped regions comprises a plurality of subregions;

    Any amount at least one of selection character or arc is to form the assembly of scale-of-two HIP sequence;

    AndDescribed HIP sequence is mapped to any of a plurality of subregions so that twist the distortion assembly of described HIP sequence, and described a plurality of subregions are selected from described warped regions.

View all claims
    ×
    ×

    Thank you for your feedback

    ×
    ×