MRAM architecture with a bit line located underneath the magnetic tunneling junction device

MRAM architecture with a bit line located underneath the magnetic tunneling junction device

  • CN 1,809,929 A
  • Filed: 05/05/2004
  • Published: 07/26/2006
  • Est. Priority Date: 05/05/2003
  • Status: Active Application
First Claim
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1. magnetic memory comprises:

  • A plurality of magnetic cells, each of described a plurality of magnetic cells all have top and bottom;

    At least the first writing line, it is connected to each bottom of the first of described a plurality of magnetic cells;

    WithAt least the second writing line, it is positioned on the top of second portion of described a plurality of magnetic cells, and each of the second portion of described at least the second writing line and described a plurality of magnetic cells is electrically insulated.

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