Thin film transistor array panel and liquid crystal display including the same

Thin film transistor array panel and liquid crystal display including the same

  • CN 1,858,640 B
  • Filed: 04/30/2006
  • Issued: 09/11/2013
  • Est. Priority Date: 05/04/2005
  • Status: Active Grant
First Claim
Patent Images

1. LCD comprises:

  • N bar gate line comprises the 1st gate line to the n gate line of arranging successively along column direction, and n 〉

    =2 and n are integer;

    M bar data line comprises the 1st data line to the m data line of arranging successively along line direction, and transmission of data signals, m 〉

    =2 and m are integer;

    Intersected and m * n pixel limiting by n bar gate line and m bar data line, m * n pixel is arranged in matrix and comprises along column direction and arranging successively and 1st pixel column to the n pixel column corresponding with n bar gate line, each pixel column comprises along line direction to be arranged and 1st pixel to the m pixel corresponding with m bar data line successively, wherein, each pixel in m * n pixel comprises the first film transistor and second thin film transistor (TFT) and is connected to the first film transistor and the pixel electrode of second thin film transistor (TFT), the first film transistor of the j pixel in the i pixel column and the first film transistor of the j pixel in the i-1 pixel column all are connected to the j data line, wherein, 2≤

    i≤

    n and i are integer, 1≤

    j≤

    m and j are integerWherein, the i gate line transmits the i signal and is connected to the first film transistor of the j pixel in the i pixel column;

    The i-1 gate line transmits the i-1 signal and is connected to second thin film transistor (TFT) of the j pixel in the i pixel column, and the i-1 signal is applied to the first film transistor of the j pixel in the i-1 pixel column;

    Wherein, second thin film transistor (TFT) of the j pixel in the i pixel column receives unified voltage and according to the pixel electrode of described i-1 signal with the j pixel of described unified voltage transmission in the i pixel column.

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