Configurable computing array based on three-dimensional vertical writable memory
First Claim
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1. A configurable computing array, comprising:
- a semiconductor substrate;
at least a configurable logic element formed on said semiconductor substrate, wherein said configurable logic element selectively realizes a logic function from a logic library;
at least a configurable computing element formed above said configurable logic element, wherein said configurable computing element comprises a three-dimensional vertical writable memory (3D-WV) array for storing at least a portion of a look-up table (LUT) for a math function, wherein at least an input of said LUT comprises multiple bits;
wherein said configurable computing array realizes a math function by programming said configurable logic element and said configurable computing element.
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Abstract
The present invention discloses a configurable computing array. It is a monolithic integrated circuit comprising at least a configurable computing element and a configurable logic element. The configurable computing element comprises at least a three-dimensional vertical writable memory (3D-WV) array, which is stacked above the configurable logic element and stores at least a portion of a look-up table (LUT) for a math function.
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20 Claims
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1. A configurable computing array, comprising:
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a semiconductor substrate; at least a configurable logic element formed on said semiconductor substrate, wherein said configurable logic element selectively realizes a logic function from a logic library; at least a configurable computing element formed above said configurable logic element, wherein said configurable computing element comprises a three-dimensional vertical writable memory (3D-WV) array for storing at least a portion of a look-up table (LUT) for a math function, wherein at least an input of said LUT comprises multiple bits; wherein said configurable computing array realizes a math function by programming said configurable logic element and said configurable computing element. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A configurable computing array, comprising:
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a semiconductor substrate; at least a configurable interconnect formed on said semiconductor substrate, wherein said configurable interconnect selectively realizes an interconnect from an interconnect library; at least a configurable computing element formed above said configurable interconnect, wherein said configurable computing element comprises a three-dimensional vertical writable memory (3D-WV) array for storing at least a portion of a look-up table (LUT) for a math function, wherein at least an input of said LUT comprises multiple bits; wherein said configurable computing array realizes a math function by programming said configurable interconnect and said configurable computing element. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A configurable computing array, comprising:
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a semiconductor substrate; at least a configurable interconnect formed on said semiconductor substrate, wherein said configurable interconnect selectively realizes an interconnect from an interconnect library; at least a configurable logic element formed on said semiconductor substrate, wherein said configurable logic element selectively realizes a logic function from a logic library; at least a configurable computing element formed above said configurable interconnect, wherein said configurable computing element comprises a three-dimensional vertical writable memory (3D-WV) array for storing at least a portion of a look-up table (LUT) for a math function, wherein at least an input of said LUT comprises multiple bits; wherein said configurable computing array realizes a math function by programming said configurable interconnect, said configurable logic element and said configurable computing element. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification