FETs and methods for forming the same
First Claim
Patent Images
1. A method of forming a semiconductor device, the method comprising:
- forming a first epitaxial structure over a substrate in an NMOS region;
forming a second epitaxial structure over the substrate in a PMOS region;
forming a shallow trench isolation (STI) region between the first epitaxial structure and the second epitaxial structure;
patterning the first epitaxial structure and the second epitaxial structure to form a first plurality of vertical channel structures and a second plurality of vertical channel structures, respectively;
reshaping the first plurality of vertical channel structures and the second plurality of vertical channel structures, wherein after the reshaping, sidewalls of the first plurality of vertical channel structures and sidewalls the second plurality of vertical channel structures have lattice shifts;
forming a gate dielectric layer in first openings between the first plurality of vertical channel structures and in second openings between the second plurality of vertical channel structures;
filling the first openings and the second openings with a conductive material; and
growing a first epitaxial source/drain material over the first plurality of vertical channel structures and a second epitaxial source/drain material over the second plurality of vertical channel structures.
0 Assignments
0 Petitions
Accused Products
Abstract
FETs and methods for forming FETs are disclosed. A structure comprises a substrate, a gate dielectric and a gate electrode. The substrate comprises a fin, and the fin comprises an epitaxial channel region. The epitaxial channel has a major surface portion of an exterior surface. The major surface portion comprising at least one lattice shift, and the at least one lattice shift comprises an inward or outward shift relative to a center of the fin. The gate dielectric is on the major surface portion of the exterior surface. The gate electrode is on the gate dielectric.
-
Citations
20 Claims
-
1. A method of forming a semiconductor device, the method comprising:
-
forming a first epitaxial structure over a substrate in an NMOS region; forming a second epitaxial structure over the substrate in a PMOS region; forming a shallow trench isolation (STI) region between the first epitaxial structure and the second epitaxial structure; patterning the first epitaxial structure and the second epitaxial structure to form a first plurality of vertical channel structures and a second plurality of vertical channel structures, respectively; reshaping the first plurality of vertical channel structures and the second plurality of vertical channel structures, wherein after the reshaping, sidewalls of the first plurality of vertical channel structures and sidewalls the second plurality of vertical channel structures have lattice shifts; forming a gate dielectric layer in first openings between the first plurality of vertical channel structures and in second openings between the second plurality of vertical channel structures; filling the first openings and the second openings with a conductive material; and growing a first epitaxial source/drain material over the first plurality of vertical channel structures and a second epitaxial source/drain material over the second plurality of vertical channel structures. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
-
-
13. A method of forming a semiconductor device, the method comprising:
-
forming an epitaxial structure over a substrate, wherein forming the epitaxial structure comprises forming a first epitaxial layer, a second epitaxial layer and a third epitaxial layer successively over the substrate; patterning the epitaxial structure to form openings in the epitaxial structure, wherein the openings extend through the third epitaxial layer, through the second epitaxial layer, and into the first epitaxial layer, wherein after the patterning, remaining portions of the third epitaxial layer and remaining portions of the second epitaxial layer form a plurality of vertical channel structures, and remaining portions of the first epitaxial layer form a first source/drain region; reshaping the plurality of vertical channel structures, wherein after the reshaping, sidewalls of each of the plurality of the vertical channel structures comprise at least one lattice shift inward or outward relative to a center of a respective vertical channel structure; forming a metal gate in the openings; and forming an epitaxial material over the plurality of vertical channel structures to form a second source/drain region. - View Dependent Claims (14, 15, 16)
-
-
17. A method of forming a semiconductor device, the method comprising:
-
forming a first epitaxial source/drain layer, an epitaxial channel layer, and a second epitaxial source/drain layer successively over a substrate; forming a patterned mask layer over the second epitaxial source/drain layer; performing an etching process using the patterned mask layer to remove portions of the first epitaxial source/drain layer, portions of the epitaxial channel layer, and portions of the second epitaxial source/drain layer, wherein remaining portions of the second epitaxial source/drain layer and remaining portions of the epitaxial channel layer form a vertical channel structure that protrudes over remaining portions of the first epitaxial source/drain layer; reshaping the vertical channel structure, wherein after the reshaping, sidewalls of the vertical channel structure have lattice shifts; forming a gate dielectric layer and a gate electrode around the vertical channel structure; recessing a top surface of the gate dielectric layer and a top surface of the gate electrode below a top surface of the remaining portions of the epitaxial channel layer; forming a first dielectric layer over the recessed gate dielectric layer and over the recessed gate electrode; and growing an epitaxial material on a top surface of the remaining portions of the second epitaxial source/drain layer. - View Dependent Claims (18, 19, 20)
-
Specification