Enhancement mode FET gate driver IC
First Claim
1. An integrated gate driver circuit for driving an enhancement mode GaN field effect transistor, comprising the following elements fully integrated in a single chip:
- a gate driver, comprising;
a first logic inverter circuit;
a supply voltage level shifter circuit having an input and an output, the supply voltage level shifter circuit converting a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output, the supply voltage level shifter comprising two stages;
a first stage which acts as a bootstrap supply, comprising an enhancement mode GaN transistor with a source terminal connected to a gate terminal and to the supply voltage, the enhancement mode GaN transistor acting as a diode to charge a bootstrap capacitor; and
a second stage comprising a second logic inverter circuit with a supply of 10 V when its output is high and a supply of 5 V when its output is low; and
an output stage; and
an undervoltage lockout circuit connected to the gate driver, comprising;
a voltage reference circuit for generating a predetermined voltage reference; and
a comparator for receiving the output of the voltage reference circuit and for preventing operation of the gate driver if the supply voltage falls below said predetermined voltage reference.
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Accused Products
Abstract
A fully integrated GaN driver comprising a digital logic signal inverter, a level shifter circuit, a UVLO circuit, an output buffer stage, and (optionally) a FET to be driven, all integrated in a single package. The level shifter circuit converts a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output. The output drive circuitry includes a high side GaN FET that is inverted compared to the low side GaN FET. The inverted high side GaN FET allows switch operation, rather than a source follower topology, thus providing a digital voltage to control the main FET being driven by the circuit.
12 Citations
6 Claims
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1. An integrated gate driver circuit for driving an enhancement mode GaN field effect transistor, comprising the following elements fully integrated in a single chip:
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a gate driver, comprising; a first logic inverter circuit; a supply voltage level shifter circuit having an input and an output, the supply voltage level shifter circuit converting a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output, the supply voltage level shifter comprising two stages; a first stage which acts as a bootstrap supply, comprising an enhancement mode GaN transistor with a source terminal connected to a gate terminal and to the supply voltage, the enhancement mode GaN transistor acting as a diode to charge a bootstrap capacitor; and a second stage comprising a second logic inverter circuit with a supply of 10 V when its output is high and a supply of 5 V when its output is low; and an output stage; and an undervoltage lockout circuit connected to the gate driver, comprising; a voltage reference circuit for generating a predetermined voltage reference; and a comparator for receiving the output of the voltage reference circuit and for preventing operation of the gate driver if the supply voltage falls below said predetermined voltage reference. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification