Supply-voltage control for device power management

• US 10,386,916 B2
• Filed: 04/10/2018
• Issued: 08/20/2019
• Est. Priority Date: 12/27/2012
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Swarna, Madhu, Raja, Tezaswi
• Primary Examiner(s): Yanchus, III, Paul B
• Application Number:
  US15/950,090
• Publication Number:
  US 20180275743A1
• Time in Patent Office: 497 Days
• Field of Search: None
• CPC Class Codes: G06F 1/3228 Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

One embodiment provides a method for reducing leakage current in device logic having an operational supply-voltage threshold, a nonzero data-retention supply voltage threshold, and two or more on-die transistor switches to switchably connect a voltage source to the device logic. After the logic enters an idle period, one or more of the switches are opened to lower a supply voltage of the logic below the operational supply-voltage threshold but above the data-retention supply-voltage threshold. When the logic exits the idle period, one or more of the switches are closed to raise the supply voltage of the logic above the operational supply-voltage threshold.

Claims

1. A method of managing leakage current in a logic device comprising:

when the logic device is in an operating period, closing a plurality of switching elements coupled in parallel between a supply voltage and the logic device to distribute a supply voltage value over the logic device that is above an operational supply-voltage threshold;

after the logic device enters an idle period for longer than an inactivity threshold, opening a first group of the plurality of switching elements, wherein a second group of the plurality of remain closed, to lower the supply voltage value distributed substantially uniformly over the logic device below the operational supply-voltage threshold but above a data-retention supply-voltage threshold; and

when the logic exits the idle period, closing the first group of the plurality of switching elements switches to raise the supply voltage value distributed over the logic device above the operational supply-voltage threshold;

wherein the opening and closing of the plurality of switching elements are distributed substantially uniformly over the logic device to distribute the supply voltage value substantially uniformly over the logic device.

2. The method of claim 1 further comprising adjusting the inactivity threshold according to a heuristic.

3. The method of claim 1 wherein the logic device enters the operating period when a function or service of the logic device is requested.

4. The method of claim 1 wherein opening and closing the plurality of transistor switches includes addressing the transistor switches in a two or more groups that share a common control line.

5. The method of claim 4 wherein the two or more groups are addressed in sequence, separated by a settling period during which the supply voltage is allowed to settle before advancing to a lower or higher value.

6. The method of claim 1 further comprising determining a number of transistor switches to open or close.

7. The method of claim 1 wherein the idle period is a first idle period, the method further comprising:

after the logic device enters a second idle period longer than the first idle period, opening the plurality of switching elements to lower the supply voltage value distributed over the logic device below the data-retention supply-voltage threshold; and

when the logic exits the second idle period, closing the plurality of switching elements to raise the supply voltage value distributed substantially uniformly over the logic device above the operational supply-voltage threshold.

8. A device exhibiting reduced leakage current, the device comprising:

a voltage supply line;

a component having an operational supply-voltage threshold for maintaining operation and a data-retention supply-voltage threshold for retaining data;

a plurality of transistor switches, arranged in parallel, to selectively couple the voltage supply line to the component, each transistor switch having a gate terminal to control whether the transistor switch is open or closed; and

a power-management unit operatively coupled to the gate terminal of each transistor switch, wherein the power management unit is configured to open one or more of the plurality of transistor switches distributed substantially uniformly over the component to lower a voltage supplied over the component from the voltage supply line below the operational supply-voltage threshold but above the data-retention supply-voltage threshold after the component enters an idle period, and to close the plurality of transistor switches to maintain the voltage supplied substantially uniformly over the component from the voltage supply line to a voltage level above the operational a supply-voltage threshold when the component exits the idle period.

9. The component of claim 8, wherein the power-management unit is configured open one or more of the plurality of transistors to lower the voltage below the operational supply-threshold but above the data-retention supply-voltage threshold when a period of component inactivity exceeds an inactivity threshold, and close the plurality of transistors to raise the voltage above operational supply-voltage threshold when a function or service of the component is requested.

10. The component of claim 8, wherein the transistor switches include field-effect transistors.

11. The component of claim 8, wherein the transistor switches are distributed over the component and grouped into a plurality of zones, each zone supplying power to a nearest region of the component.

12. The component of claim 8 wherein the voltage supply line, the component, the plurality of transistor switches, and the power-management unit are arranged on a same die.

13. A device exhibiting reduced leakage current comprising:

logic having an operational supply-voltage threshold for maintaining operation and a data-retention supply-voltage threshold for retaining data;

distributed over the logic, two or more zones of transistor switches, the transistor switches of each zone connected in parallel with gate terminals connected to a common control line, each zone switchably connecting a voltage supply substantially uniformly across a nearest region of the logic; and

a power-management unit operatively coupled to the control line of each zone and configured to open one or more zones of the transistor switches to lower a voltage supplied over the logic to below the operational supply-voltage threshold but above the voltage above the data-retention supply-voltage threshold when a period of inactivity of the logic exceeds a first inactivity threshold.

14. The device of claim 13, wherein the power-management unit is further configured to close all zones of the transistor switches to raise the voltage supplied over the logic to above the operational supply-voltage threshold when a function or service of the logic is requested.

15. The device of claim 13, wherein the power-management unit is further configured to:

close all zones of the transistor switches to raise the voltage supplied over the logic to above the operational supply-voltage threshold when the period of inactivity of the logic exceeds a second inactivity threshold;

save a state of the logic after the voltage supplied over the logic is raised above the operational supply-voltage threshold when the period of inactivity of the logic exceeds a second inactivity threshold; and

open all zones of the transistor switches to lower a voltage supplied over the logic below the data-retention supply-voltage threshold after the state of the logic has been saved when the period of inactivity of the logic exceeds the second inactivity threshold.

16. The device of claim 15, wherein the power-management unit is further configured to:

close all zones of the transistor switches to raise the voltage supplied over the logic to above the operational supply-voltage threshold when a function or service of the logic is requested; and

restore the state of the logic after the voltage supplied over the logic is raised above the operational supply-voltage threshold.

17. The device of claim 15, wherein the state of the logic comprises a state of one or more of a register file, a cache, and a bit.

18. The device of claim 15, wherein the power-management unit is further configured to;

adjust the first inactivity threshold according to a first heuristic; and

adjust the second inactivity threshold according to a second heuristic.