Method of manufacturing embedded packaging with preformed vias

• US 10,460,958 B2
• Filed: 09/30/2015
• Issued: 10/29/2019
• Est. Priority Date: 08/07/2013
• Status: Active Grant

• Current Assignee: Invensas Corporation
• Original Assignee: Adeia Semiconductor Technologies LLC (f/k/a Invensas Corporation) (Adeia Inc.)
• Inventors: Mohammed, Ilyas, Haba, Belgacem
• Primary Examiner(s): Vo, Peter Dungba
• Assistant Examiner(s): Parvez, Azm A
• Application Number:
  US14/870,823
• Publication Number:
  US 20160020121A1
• Time in Patent Office: 1,490 Days
• Field of Search: 29842, 29832, 29829, 29825, 295921
• CPC Class Codes: H01L 21/4846 Leads on or in insulating or insulated substrates, e.g. metallisation H01L21/4821 takes precedence; metallisation of ceramics in general C04B41/51; printed circuits H05K3/00
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2225/1035 the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/18162 : of a chip with build-up interconnect
• CPC Class Codes: H05K 1/185 : Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit semiconductor chips encapsulated by interconnect and support structures H01L23/5389, H01L24/00
• CPC Class Codes: H05K 7/00 : Constructional details common to different types of electric apparatus casings, cabinets, drawers H05K5/00
• CPC Class Codes: Y10T 29/49147 : Assembling terminal to base

Abstract

Microelectronic assemblies and methods of making the same are disclosed. In some embodiments, a microelectronic assembly includes a microelectronic element having edge surfaces bounding a front surface and contacts at the front surface; rigid metal posts disposed between at least one edge surface and a corresponding edge of the assembly, each metal post having a sidewall separating first and second end surfaces, the sidewalls have a root mean square (rms) surface roughness of less than about 1 micron; a encapsulation contacting at least the edge surfaces and the sidewalls; an insulation layer overlying the encapsulation; connection elements extending through the insulation layer, wherein at least some connection elements have cross sections smaller than those of the metal posts; a redistribution structure deposited on the insulation layer and electrically connecting first terminals with corresponding metal posts through the first connection elements, some metal posts electrically coupled with contacts of microelectronic element.

Claims

1. A method of forming a microelectronic assembly, comprising:

forming a structure including a microelectronic element having a front surface, edge surfaces bounding the front surface, and contacts at the front surface, and substantially rigid metal posts extending in a first direction, the posts disposed between at least one of the edge surfaces and a corresponding edge of the structure, each metal post having a sidewall separating first and second end surfaces of such metal post from one another, the sidewalls of the metal posts having a root mean square (rms) surface roughness of less than about 1 micron; and

then,

forming an encapsulation having a thickness extending in the first direction between first and second surfaces of the encapsulation, the encapsulation contacting at least the edge surfaces of the microelectronic element and the sidewalls of the metal posts, wherein the metal posts extend at least partly through the thickness, and the encapsulation electrically insulates adjacent metal posts from one another;

depositing an insulation layer overlying the first surface of the encapsulation and having a thickness extending away from the first surface of the encapsulation;

forming connection elements directly adjacent and extending away from the first end surfaces of the metal posts and through the thickness of the insulation layer, wherein at least some connection elements have cross sections smaller than respective cross sections of the metal posts from which the connection elements extend;

depositing an electrically conductive redistribution structure on the insulation layer, the redistribution structure electrically connecting at least some metal posts with the contacts of the microelectronic element; and

forming terminals at a first side of the microelectronic assembly adjacent to the first surface of the encapsulation, wherein at least some of the at least some connection elements electrically connect at least some of the first end surfaces with corresponding terminals.

2. The method of claim 1, wherein, prior to forming the structure, the metal posts extend in the first direction from a first surface of a conductive layer, the posts disposed between a first portion of the first surface of the conductive layer and a corresponding edge of the conductive layer.

3. The method of claim 2, wherein forming the structure further comprises:

attaching the front surface of the microelectronic element to the first portion of the first surface of the conductive layer.

4. The method of claim 3, wherein, prior to forming the structure, the method further comprises:

providing a substrate having a thickness extending in the first direction from a first surface to a second surface of the substrate, the substrate having a plurality of rigid elements extending in the first direction at the second surface of the substrate; and

depositing a conductive material on the second surface of the substrate and surfaces of the rigid elements to form the metal posts and conductive layer.

5. The method of claim 4, wherein after forming the encapsulation, the method further comprises:

removing the substrate and the rigid elements to reveal openings in the metal posts, the openings in the metal posts extending in the first direction from the front surface of the microelectronic assembly; and

filling the openings with additional conductive material prior to depositing the insulation layer.

6. The method of claim 3, wherein, after forming the encapsulation and prior to depositing the insulation layer, the method further comprises:

removing the conductive layer to expose the first end surfaces of the metal posts.

7. The method of claim 6, further comprising:

forming a second insulation layer overlying the second surface of the encapsulation and having a thickness extending away from the second surface of the encapsulation;

forming second connection elements extending away from the second end surfaces of the metal posts and through the thickness of the second insulation layer, wherein at least some second connection elements have cross sections smaller than cross sections of the metal posts;

depositing an electrically conductive redistribution structure on the second insulation layer; and

forming second terminals at the second side of the microelectronic assembly adjacent to the second surface of the encapsulation, wherein the second terminals are overlying the redistribution structure, wherein the second connection elements electrically connecting at least some second end surfaces with corresponding second terminals through the redistribution structure.

8. The method of claim 6, further comprising:

forming openings extending between at least some second end surfaces of metal posts and the second surface of the encapsulation, the openings exposing at least portions of second end surfaces of the metal posts; and

forming second connection elements extending through the openings in the encapsulation and electrically connected to at least some metal posts at the second end surfaces.

9. The method of claim 2, wherein, prior to forming the structure, the front surface of the microelectronic element is attached to a carrier.

10. The method of claim 9, wherein forming the structure further comprises:

attaching the carrier to the metal posts such that the microelectronic element is juxtaposed with the first portion of the first surface of the conductive layer.

11. The method of claim 10, wherein the microelectronic element and the first portion of the first surface of the conductive layer are separated therefrom.

12. The method of claim 10, wherein, after forming the encapsulation, the method further comprises:

removing the carrier to expose the front surface of the microelectronic element and the second end surfaces of the metal posts; and

removing the conductive layer to expose the first end surfaces of the metal posts.

13. The method of claim 1, wherein the microelectronic further comprises a rear surface opposed to the front surface and a thickness extending between the front and rear surfaces of the microelectronic element, wherein the thickness of the encapsulation and the thickness of the microelectronic element are substantially the same.

14. The method of claim 1, wherein the microelectronic element further comprises a rear surface opposed to the front surface and a thickness extending between the front and rear surface, wherein the thickness of the encapsulation and the thickness of the microelectronic element are different.

15. The method of claim 1, wherein the insulation layer further includes first and opposed second surfaces, and the thickness of the insulation layer extends from the first surface to the second opposed surface.

16. The method of claim 1, wherein forming the connection elements further includes forming the at least some connection elements so that the at least some connection elements directly overlie and contact the metal posts.

17. The method of claim 1, wherein the connection elements include sidewalls having an rms surface roughness that is greater than the rms of the sidewalls of the metal posts.

18. A method of forming a microelectronic assembly, comprising:

providing a conductive layer with substantially rigid metal posts extending in a first direction away from a first surface of the conductive layer, the posts disposed between a first portion of the first surface of the conductive layer and a corresponding edge of the conductive layer;

attaching a front surface of the microelectronic to a carrier and attaching the carrier to the metal posts so that the microelectronic element is juxtaposed with the first portion of a first surface of the conductive layer; and

then

forming a structure including a microelectronic element having edge surfaces bounding the front surface, and contacts at the front surface, the posts disposed between at least one of the edge surfaces and a corresponding edge of the structure, each metal post having a sidewall separating first and second end surfaces of such metal post from one another, the sidewalls of the metal posts having a root mean square (rms) surface roughness of less than about 1 micron;

forming an encapsulation having a thickness extending in the first direction between first and second surfaces of the encapsulation, the encapsulation contacting at least the edge surfaces of the microelectronic element and the sidewalls of the metal posts, wherein the metal posts extend at least partly through the thickness, and the encapsulation electrically insulates adjacent metal posts from one another;

depositing an insulation layer overlying the first surface of the encapsulation and having a thickness extending away from the first surface of the encapsulation;

forming connection elements extending away from the first end surfaces of the metal posts and through the thickness of the first insulation layer, wherein at least some connection elements have cross sections smaller than cross sections of the metal posts;

depositing an electrically conductive redistribution structure on the insulation layer, the redistribution structure electrically connecting at least some metal posts with the contacts of the microelectronic element; and

forming terminals at a first side of the microelectronic assembly adjacent to the first surface of the encapsulation, wherein at least some of the at least some connection elements electrically connect at least some of the first end surfaces of the rigid posts with corresponding terminals.

19. The method of claim 18, wherein the microelectronic element and the first portion of the first surface of the conductive layer are separated therefrom.

20. The method of claim 18, wherein, after forming the encapsulation, the method further comprises:

removing the carrier to expose the front surface of the microelectronic element and the second end surfaces of the metal posts; and

removing the conductive layer to expose the first end surfaces of the metal posts.