Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor

• US 20010034076A1
• Filed: 01/29/2001
• Published: 10/25/2001
• Est. Priority Date: 02/01/2000
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Martin, John R.
• Granted Patent: US 6,674,140 B2
• Time in Patent Office: Days
• US Class Current: 438/50
• CPC Class Codes: B81B 3/0005 Anti-stiction coatings
• CPC Class Codes: B81C 1/0096 For avoiding stiction when the device is in use, i.e. after manufacture has been completed
• CPC Class Codes: B81C 2201/0176 Chemical vapour Deposition
• CPC Class Codes: B81C 2201/112 Depositing an anti-stiction or passivation coating, e.g. on the elastic or moving parts
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02216 the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
• CPC Class Codes: H01L 21/02263 deposition from the gas or vapour phase
• CPC Class Codes: H01L 21/3122 layers comprising polysiloxane compounds
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48624 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

This invention discloses a process for forming durable anti-stiction surfaces on micromachined structures while they are still in wafer form (i.e., before they are separated into discrete devices for assembly into packages). This process involves the vapor deposition of a material to create a low stiction surface. It also discloses chemicals which are effective in imparting an anti-stiction property to the chip. These include polyphenylsiloxanes, silanol terminated phenylsiloxanes and similar materials.

Claims

1. A method for imparting anti-stiction properties to a micromachined device, said device being in a chip derived from a wafer comprising:

a. placing said wafer in an oven along with an organo silicon compound

b. optionally creating a vacuum in said oven and optionally replacing the oven atmosphere with an unreactive gas such as nitrogen,

c. heating said oven to a temperature such that at least some of said organo silicon is vaporized,

d. cooling said oven and removing said wafer, and

e. optionally cutting said wafer into chips.

2. The method of

claim 1

in which said organo silicon compound is selected from the group consisting of a methyl, methylphenyl or phenyl alkoxysilane, diphenyldiethoxysilane, diphenyldimethoxysilane, diphenylsilanediol, a diphenyl siloxane, hexamethyldisilazane, hexaphenylcyclotrisiloxane, hexaphenyldisiloxane, a methylphenyl siloxane, octaphenylcyclotetrasiloxane, a phenyl siloxane, phenyltrimethoxysilane, a silanol-terminated diphenylsiloxane, silanol-terminated polydiphenylsiloxane, tetraphenyldisiloxanediol, triphenyl silane, triphenylsilanol, and mixtures thereof.

3. The method of

claim 2

wherein said organo silicon compound contains silanol-terminated polydiphenylsiloxane, diphenylsilanediol or tetraphenyldisiloxanediol.

4. The method of

claim 1

wherein said temperature is between approximately 100°

and 500°

C.

5. The method of

claim 4

wherein said temperature is between approximately 300°

and 500°

C.

6. The method of

claim 4

wherein said temperature is between approximately 100°

and 300°

C.

7. A chip having anti-stiction properties, said chip from a wafer treated with the vapor of an organic compound.

8. The chip of

claim 7

wherein said organic compound is an organo silicon compound.

9. The chip of

claim 8

wherein said organo silicon compound is selected from the group consisting of diphenylsilanediol, a diphenyl siloxane, hexaphenylcyclotrisiloxane, hexaphenyldisiloxane, octaphenylcyclotetrasiloxane, silanol-terminated diphenylsiloxane, silanol-terminated polydiphenylsiloxane, tetraphenyldisiloxanediol, triphenyl silane, triphenylsilanol, and mixtures thereof.

10. The chip of

claim 7

wherein said chip comprises at least one inertial sensor.

11. The chip of

claim 10

wherein said inertial sensor is an accelerometer or a gyroscope.

12. The chip of

claim 8

wherein said chip comprises at least one inertial sensor.

13. The chip of

claim 12

wherein said inertial sensor is an accelerometer or a gyroscope.

14. The chip of

claim 7

, wherein said chip comprises at least one microstructure that has an optical function.

15. The chip of

claim 8

, wherein said chip comprises at least one microstructure that has an optical function.

16. The chip of

claim 15

wherein said chip has at least one microstructure with a characteristic selected from the group consisting of:

a. significant optical transmission,

b. significant optical reflectivity,

c. functionality, in whole or in part, as an optical interferometer.

17. A chip of

claim 7

, wherein said chip has at least one microstructure that is deflected or positioned by an imposed electrostatic field.

18. A chip of

claim 8

, wherein said chip has at least one microstructure that is deflected or positioned by an imposed electrostatic field.

19. The chip of

claim 7

wherein said chip has at least one microstructure that is deflected by an imposed magnetic field.

20. The chip of

claim 8

, wherein said chip has at least one microstructure that is deflected by an imposed magnetic field.

21. The chip of

claim 7

, wherein said treatment with the vapor of an organic compound controls the electrical characteristics of the microstructure surface.

22. The chip of

claim 8

, wherein said treatment with the vapor of an organo silicon compound controls the electrical characteristics of the microstructure surface.

23. The chip of

claim 7

, wherein said treatment with organo silicon compound reduces adsorption of gases from the surrounding environment on the microstructure, or to control interactions of the microstructure with the surrounding environment.

24. The chip of

claim 8

, wherein said treatment with organo silicon compound reduces adsorption of gases from the surrounding environment on the microstructure, or to control interactions of the microstructure with the surrounding environment.

25. A method for using a micromachined device having good anti-stiction properties, said device being in a chip derived from a wafer said wafer manufactured by a process comprising:

a. placing said wafer in an oven along with an organo silicon compound

b. optionally creating a vacuum in said oven and optionally replacing the oven atmosphere with an unreactive gas such as nitrogen,

c. heating said oven to a temperature such that at least some of said organo silicon is vaporized,

d. cooling said oven and removing said wafer, and

e. optionally cutting said wafer into chips.

26. The method of

claim 25

wherein said uses are selected from the group consisting of:

a. controlling surface electrical properties,

b. suppressing adsorption on the surface of said device,

c. controlling adsorption on the surface of said device, and

d. imparting wear resistant properties to at least one surface of said device.

27. The method of

claim 26

wherein said organo silicon compound is a phenyl silicon compound.

28. A method in which moisture is reacted with a silicone material above approximately 200°

C., said reaction promoting the formation of a thin surface coating containing some of the products of that reaction.